diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-03-10 13:51:38 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-03-12 00:48:20 +0000 |
| commit | 07d3b69413317e75b54ee768cd60c5b7582c403b (patch) | |
| tree | a71eac4b589e4603d636169ac665bbb2d418e148 /chip/mec1322/config_chip.h | |
| parent | 27199e7b64659a2db7114c670b903578858f8d50 (diff) | |
| download | chrome-ec-07d3b69413317e75b54ee768cd60c5b7582c403b.tar.gz | |
mec1322: Add flash physical interface functions
Add physical flash interface for read / write / protection of external
SPI on mec1322.
BUG=chrome-os-partner:36167
TEST=Manual on glower:
flashread 0xf000 0x200 --> dumps 0xff
flashwrite 0xf000 0x200
flashread 0xf000 0x200 --> dumps write pattern
flasherase 0xf000 0x1000
flashread 0xf000 0x200 --> dumps 0xff
spi_flash_prot 0 0x10000
flashinfo --> shows first 64KB protected
spi_flashwrite 0xf000 0x200 --> access denied
spi_flashwrite 0x1f000 0x200 --> OK
flashread 0x1f000 0x200 --> dumps write pattern
BRANCH=None
Change-Id: I2cb20a49934999fc0dd9b3425eb99708711637c5
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/257132
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/mec1322/config_chip.h')
| -rw-r--r-- | chip/mec1322/config_chip.h | 49 |
1 files changed, 31 insertions, 18 deletions
diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h index 9a0d770f50..797a895c3e 100644 --- a/chip/mec1322/config_chip.h +++ b/chip/mec1322/config_chip.h @@ -47,25 +47,36 @@ /* Default task stack size */ #define TASK_STACK_SIZE 512 -#define CONFIG_FLASH_BASE 0x00100000 +/****************************************************************************/ +/* Define our flash layout. */ +/* Protect bank size 4K bytes */ +#define CONFIG_FLASH_BANK_SIZE 0x00001000 +/* Sector erase size 4K bytes */ +#define CONFIG_FLASH_ERASE_SIZE 0x00001000 +/* Minimum write size */ +#define CONFIG_FLASH_WRITE_SIZE 0x00000004 -#define CONFIG_FLASH_PHYSICAL_SIZE 0x00018000 +/* One page size for write */ +#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 -/* Size of one firmware image in RAM */ +/* 96KB flash used for program memory */ +#define CONFIG_FLASH_PHYSICAL_SIZE 0x00018000 +/* Program memory base address */ +#define CONFIG_FLASH_BASE 0x00100000 -/****************************************************************************/ -/* Define our flash layout. */ +#define CONFIG_CDRAM_BASE 0x00100000 +#define CONFIG_CDRAM_SIZE 0x00020000 /* Size of one firmware image in flash */ #ifndef CONFIG_FW_IMAGE_SIZE -#define CONFIG_FW_IMAGE_SIZE (CONFIG_FLASH_PHYSICAL_SIZE / 2) +#define CONFIG_FW_IMAGE_SIZE (CONFIG_FLASH_PHYSICAL_SIZE / 2) #endif /* RO firmware must start at beginning of flash */ -#define CONFIG_FW_RO_OFF 0 +#define CONFIG_FW_RO_OFF 0 -#define CONFIG_FW_RO_SIZE CONFIG_FW_IMAGE_SIZE -#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE +#define CONFIG_FW_RO_SIZE CONFIG_FW_IMAGE_SIZE +#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE /* * TODO(crosbug.com/p/37510): Implement a loader to load either RO or RW at @@ -73,14 +84,18 @@ * memory, only flash + load RW for now. */ #undef CONFIG_FW_INCLUDE_RO -#define CONFIG_FW_RW_OFF CONFIG_FW_RO_OFF -#define CONFIG_FW_RW_SIZE CONFIG_FLASH_PHYSICAL_SIZE +#define CONFIG_FW_RW_OFF CONFIG_FW_RO_OFF +#define CONFIG_FW_RW_SIZE CONFIG_FLASH_PHYSICAL_SIZE /* TODO(crosbug.com/p/23796): why 2 sets of configs with the same numbers? */ -#define CONFIG_FW_WP_RO_OFF CONFIG_FW_RO_OFF -#define CONFIG_FW_WP_RO_SIZE CONFIG_FW_RO_SIZE +#define CONFIG_FW_WP_RO_OFF CONFIG_FW_RO_OFF +#define CONFIG_FW_WP_RO_SIZE CONFIG_FW_RO_SIZE -#define CONFIG_FLASH_BANK_SIZE 4 +/* Non-memmapped, external SPI */ +/* #define CONFIG_CODERAM_ARCH */ +#undef CONFIG_FLASH_MAPPED +#undef CONFIG_FLASH_PSTATE +#define CONFIG_SPI_FLASH /****************************************************************************/ /* Customize the build */ @@ -91,12 +106,10 @@ #define CONFIG_SWITCH #define CONFIG_MPU #endif +#define CONFIG_DMA +#define CONFIG_FPU #define CONFIG_I2C #define CONFIG_LPC -#define CONFIG_FPU #define CONFIG_SPI -#define CONFIG_DMA - -#undef CONFIG_FLASH #endif /* __CROS_EC_CONFIG_CHIP_H */ |