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author | Andrey Petrov <andrey.petrov@intel.com> | 2015-06-25 17:41:42 -0700 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-01 03:48:55 +0000 |
commit | d2dabdae5d2b348f3c5fe3d13c64834451e214b5 (patch) | |
tree | 562e58c39d6d09004fbf1500610ed79ccbbdc92e /chip/mec1322/flash.c | |
parent | 0c331e6fcbe5f227e106485ea0477935d802cf4e (diff) | |
download | chrome-ec-d2dabdae5d2b348f3c5fe3d13c64834451e214b5.tar.gz |
mec1322: fix flash_physical_read()
flashrom on target issues a salvo of flash read commands with small
buffer size (128 bytes). Since there is no yield this starves other
tasks/events including hooks and as result watchdog is never reloaded.
This change makes read function yield to other tasks. In addition,
spi_enable()/disable chaining leads to situations where a SPI can be
disabled in the middle of transcation. This is addressed by keeping
SPI permanently enabled in LFW entry function, as well as in RW/RO
early init functions.
BRANCH=None
BUG=chrome-os-partner:38103
TEST=manual on Cyan, run flashrom -p ec -w xx in cycles, swaping xx so that
flashrom does flash. Make sure there is no watchdog triggered
Change-Id: Id5c50239a1d5c64054d7c660dd03b2be4678221c
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282111
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Diffstat (limited to 'chip/mec1322/flash.c')
-rw-r--r-- | chip/mec1322/flash.c | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/chip/mec1322/flash.c b/chip/mec1322/flash.c index 679c64795a..a893ba7868 100644 --- a/chip/mec1322/flash.c +++ b/chip/mec1322/flash.c @@ -28,7 +28,6 @@ int flash_physical_read(int offset, int size, char *data) offset += CONFIG_FLASH_BASE_SPI; - spi_enable(1); for (i = 0; i < size; i += read_size) { read_size = MIN((size - i), SPI_FLASH_MAX_READ_SIZE); ret = spi_flash_read((uint8_t *)(data + i), @@ -36,8 +35,9 @@ int flash_physical_read(int offset, int size, char *data) read_size); if (ret != EC_SUCCESS) break; + /* yield so other tasks get a chance to wake up */ + msleep(1); } - spi_enable(0); return ret; } @@ -61,7 +61,6 @@ int flash_physical_write(int offset, int size, const char *data) if ((offset | size | (uint32_t)(uintptr_t)data) & 3) return EC_ERROR_INVAL; - spi_enable(1); for (i = 0; i < size; i += write_size) { write_size = MIN((size - i), SPI_FLASH_MAX_WRITE_SIZE); ret = spi_flash_write(offset + i, @@ -70,7 +69,6 @@ int flash_physical_write(int offset, int size, const char *data) if (ret != EC_SUCCESS) break; } - spi_enable(0); return ret; } @@ -87,9 +85,7 @@ int flash_physical_erase(int offset, int size) int ret; offset += CONFIG_FLASH_BASE_SPI; - spi_enable(1); ret = spi_flash_erase(offset, size); - spi_enable(0); return ret; } @@ -112,9 +108,7 @@ int flash_physical_get_protect(int bank) uint32_t addr = bank * CONFIG_FLASH_BANK_SIZE; int ret; - spi_enable(1); ret = spi_flash_check_protect(addr, CONFIG_FLASH_BANK_SIZE); - spi_enable(0); return ret; #else return 0; @@ -147,9 +141,7 @@ int flash_physical_protect_now(int all) size = CONFIG_WP_SIZE; } - spi_enable(1); ret = spi_flash_set_protect(offset, size); - spi_enable(0); return ret; #else return 0; @@ -175,14 +167,12 @@ uint32_t flash_physical_get_protect_flags(void) * scenarios */ - spi_enable(1); if (spi_flash_check_protect(CONFIG_RO_STORAGE_OFF, CONFIG_RO_SIZE)) { flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW; if (spi_flash_check_protect(CONFIG_RW_STORAGE_OFF, CONFIG_RW_SIZE)) flags |= EC_FLASH_PROTECT_ALL_NOW; } - spi_enable(0); #endif return flags; } @@ -264,9 +254,7 @@ int flash_physical_protect_at_boot(enum flash_wp_range range) break; } - spi_enable(1); ret = spi_flash_set_protect(offset, size); - spi_enable(0); return ret; #else return 0; |