diff options
| author | Kyoung Kim <kyoung.il.kim@intel.com> | 2015-09-17 15:56:48 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-25 14:50:34 -0700 |
| commit | bd1cb857c4df12385c9cf09c00f7cf52b127c211 (patch) | |
| tree | 9cd7e5e87d3ed5b1673645f31bd871ce257765ff /chip/mec1322/lfw/ec_lfw.ld | |
| parent | e1b26d02d641db492f4da38c0977de3e43b8ab57 (diff) | |
| download | chrome-ec-bd1cb857c4df12385c9cf09c00f7cf52b127c211.tar.gz | |
mec1322: More code space in RAM
1. No need for loader data ram
2. 97K code size
3. shifting down RO/RW image location in RAM by 1Kbyte.
(loader code space: 4k to 3k)
BUG=none
TEST=1. build image with big code additions.(like low power idle patch)
and check if there is flash size related error message.
2. check if EC's RO image can boot from loader.
3. use EC console command, "sysjump RO/RW" and check if it works.
4. Verified in Cyan and Kunimitsu.
BRANCH=none
Change-Id: Ie4daf44cdba944e3e58894ca80183fcdb0fdbc7c
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/302149
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/mec1322/lfw/ec_lfw.ld')
| -rw-r--r-- | chip/mec1322/lfw/ec_lfw.ld | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/mec1322/lfw/ec_lfw.ld b/chip/mec1322/lfw/ec_lfw.ld index 0467595941..55b5fda390 100644 --- a/chip/mec1322/lfw/ec_lfw.ld +++ b/chip/mec1322/lfw/ec_lfw.ld @@ -10,7 +10,7 @@ MEMORY { VECTOR(r ) : ORIGIN = 0x100000, LENGTH = 24 - SRAM (xrw) : ORIGIN = 0x100018, LENGTH = 0x1000 - LENGTH(VECTOR) + SRAM (xrw) : ORIGIN = 0x100018, LENGTH = 0xC00 - LENGTH(VECTOR) } /* |