skylake: set and clear wake masks in S0 <-> S0ix transitions

In the S0 <-> S3 transition, Coreboot sends EC messages to set/clear the
wake masks when the SMI is invoked. For S0ix, EC sets and clears the
wake mask via this patch.

These functions are directly invoked from the state machine transition states.
During S0ix entry, the wake mask for lid open is enabled. During S0ix exit,
the wake mask for lid open is cleared. All pending events are also cleared

BRANCH=none
BUG=chrome-os-partner:48834
TEST=test lidopen in S0ix

Signed-off-by: Archana Patni <archana.patni@intel.com>
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Change-Id: I52a15f502ef637f7b7e4b559820deecb831d818f
Reviewed-on: https://chromium-review.googlesource.com/320190
Commit-Ready: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>

1 files changed, 48 insertions, 0 deletions

diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c
index fe082d51ea..a53a02efad 100644
--- a/chip/mec1322/lpc.c
+++ b/chip/mec1322/lpc.c
@@ -18,6 +18,7 @@
 #include "task.h"
 #include "timer.h"
 #include "util.h"
+#include "chipset.h"
 
 /* Console output macros */
 #define CPUTS(outstr) cputs(CC_LPC, outstr)
@@ -609,3 +610,50 @@ static int lpc_get_protocol_info(struct host_cmd_handler_args *args)
 DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO,
 		lpc_get_protocol_info,
 		EC_VER_MASK(0));
+
+#ifdef CONFIG_POWER_S0IX
+static void lpc_clear_host_events(void)
+{
+	while (lpc_query_host_event_state() != 0);
+}
+
+/*
+ * In AP S0 -> S3 & S0ix transitions,
+ * the chipset_suspend is called.
+ *
+ * The chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)
+ * is used to detect the S0ix transiton.
+ *
+ * During S0ix entry, the wake mask for lid open is enabled.
+ *
+ */
+void lpc_enable_wake_mask_for_lid_open(void)
+{
+	if ((chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)) ||
+				chipset_in_state(CHIPSET_STATE_STANDBY)) {
+		uint32_t mask = 0;
+
+		mask = ((lpc_get_host_event_mask(LPC_HOST_EVENT_WAKE)) |
+			EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN));
+
+		lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, mask);
+}	}
+
+/*
+ * In AP S0ix & S3 -> S0 transitions,
+ * the chipset_resume hook is called.
+ *
+ * During S0ix exit, the wake mask for lid open is disabled.
+ * All pending events are cleared
+ *
+ */
+void lpc_disable_wake_mask_for_lid_open(void)
+{
+	if ((chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)) ||
+				chipset_in_state(CHIPSET_STATE_ON)) {
+		lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
+		lpc_clear_host_events();
+	}
+}
+
+#endif