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authorVic (Chun-Ju) Yang <victoryang@chromium.org>2013-12-30 10:53:14 +0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-01-28 04:35:50 +0000
commit9785d09fcbc79b034e8b4f8b6a21fab418fafc3e (patch)
tree743ed349eb4debc23915f239a569e0de65f2feca /chip/mec1322/registers.h
parentaa636df6ab83d8ca08dc87c4140dceb40dd65900 (diff)
downloadchrome-ec-9785d09fcbc79b034e8b4f8b6a21fab418fafc3e.tar.gz
mec1322: hibernation supportstabilize-5339.B
This adds hibernation support. The chip can be waken by either GPIO or a timer. The maximum delay allowed is ~2 hours. BUG=chrome-os-partner:24107 TEST=hibernate and wake by GPIO TEST=hibernate and wake by timer BRANCH=None Change-Id: I1e064638a5008894a002a06a738bf6104f18636d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181202 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/mec1322/registers.h')
-rw-r--r--chip/mec1322/registers.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/chip/mec1322/registers.h b/chip/mec1322/registers.h
index edc276f0eb..396b9efbe7 100644
--- a/chip/mec1322/registers.h
+++ b/chip/mec1322/registers.h
@@ -44,6 +44,7 @@
#define MEC1322_EC_TRACE_EN REG32(MEC1322_EC_BASE + 0x1c)
#define MEC1322_EC_JTAG_EN REG32(MEC1322_EC_BASE + 0x20)
#define MEC1322_EC_WDT_CNT REG32(MEC1322_EC_BASE + 0x28)
+#define MEC1322_EC_ADC_VREF_PD REG32(MEC1322_EC_BASE + 0x38)
/* Interrupt aggregator */
@@ -285,6 +286,13 @@ static inline uintptr_t gpio_port_base(int port_id)
#define MEC1322_ADC_READ(x) REG32(MEC1322_ADC_BASE + 0x14 + (x) * 0x4)
+/* Hibernation timer */
+#define MEC1322_HTIMER_BASE 0x40009800
+#define MEC1322_HTIMER_PRELOAD REG16(MEC1322_HTIMER_BASE + 0x0)
+#define MEC1322_HTIMER_CONTROL REG16(MEC1322_HTIMER_BASE + 0x4)
+#define MEC1322_HTIMER_COUNT REG16(MEC1322_HTIMER_BASE + 0x8)
+
+
/* IRQ Numbers */
#define MEC1322_IRQ_I2C_0 0
#define MEC1322_IRQ_I2C_1 1