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| author | Vic (Chun-Ju) Yang <victoryang@chromium.org> | 2013-11-29 12:20:22 +0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2013-12-04 13:34:56 +0000 |
| commit | 06e60734910d952830c2102cd2ab002ddc99029b (patch) | |
| tree | 9d1f1ba042987e5d81e26bf8acedbe463c74d282 /chip/mec1322/registers.h | |
| parent | 715ad86d43f0695363d3749f2c202f5e3f7e3bd2 (diff) | |
| download | chrome-ec-06e60734910d952830c2102cd2ab002ddc99029b.tar.gz | |
mec1322: Fan control driver
This adds the driver for PWM duty cycle based and RPM based fan control.
BUG=chrome-os-partner:24107
TEST='fanset 5000' and fan spins up.
'fanset 8000' and fan spins faster.
'fanset 0' and fan stops.
'fanduty 30' and fan spins up.
'fanduty 50' and fan spins faster.
'fanduty 30' and fan slows down.
'fanset 6000' and fan goes to ~6000 RPM.
Unplug fan power and see 'fan 0 stalled'.
Plug power back and doesn't see stall warning anymore.
BRANCH=None
Change-Id: Ice3e5c03686cde57894e888e34ae2070c33b4e4d
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178402
Diffstat (limited to 'chip/mec1322/registers.h')
| -rw-r--r-- | chip/mec1322/registers.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/chip/mec1322/registers.h b/chip/mec1322/registers.h index 8a134415f1..e1827fbc61 100644 --- a/chip/mec1322/registers.h +++ b/chip/mec1322/registers.h @@ -189,6 +189,24 @@ static inline uintptr_t gpio_port_base(int port_id) #define MEC1322_ACPI_EC_OS2EC(x, y) REG8(MEC1322_ACPI_EC_BASE(x) + 0x108 + (y)) +/* FAN */ +#define MEC1322_FAN_BASE 0x4000a000 +#define MEC1322_FAN_SETTING REG8(MEC1322_FAN_BASE + 0x0) +#define MEC1322_FAN_PWM_DIVIDE REG8(MEC1322_FAN_BASE + 0x1) +#define MEC1322_FAN_CFG1 REG8(MEC1322_FAN_BASE + 0x2) +#define MEC1322_FAN_CFG2 REG8(MEC1322_FAN_BASE + 0x3) +#define MEC1322_FAN_GAIN REG8(MEC1322_FAN_BASE + 0x5) +#define MEC1322_FAN_SPIN_UP REG8(MEC1322_FAN_BASE + 0x6) +#define MEC1322_FAN_STEP REG8(MEC1322_FAN_BASE + 0x7) +#define MEC1322_FAN_MIN_DRV REG8(MEC1322_FAN_BASE + 0x8) +#define MEC1322_FAN_VALID_CNT REG8(MEC1322_FAN_BASE + 0x9) +#define MEC1322_FAN_DRV_FAIL REG16(MEC1322_FAN_BASE + 0xa) +#define MEC1322_FAN_TARGET REG16(MEC1322_FAN_BASE + 0xc) +#define MEC1322_FAN_READING REG16(MEC1322_FAN_BASE + 0xe) +#define MEC1322_FAN_BASE_FREQ REG8(MEC1322_FAN_BASE + 0x10) +#define MEC1322_FAN_STATUS REG8(MEC1322_FAN_BASE + 0x11) + + /* IRQ Numbers */ #define MEC1322_IRQ_I2C_0 0 #define MEC1322_IRQ_I2C_1 1 |