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| author | Vic (Chun-Ju) Yang <victoryang@chromium.org> | 2013-11-27 15:18:20 +0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2013-12-04 13:34:50 +0000 |
| commit | 36eb70c637e0221542f63170139613a52ba71e98 (patch) | |
| tree | 612a88145b221e7bd03ee077c6413e1796686a50 /chip/mec1322/registers.h | |
| parent | ebb54a453d32ccda52a01f0381b47846aaa953f1 (diff) | |
| download | chrome-ec-36eb70c637e0221542f63170139613a52ba71e98.tar.gz | |
mec1322: LPC host command support
With this, basic host command functionality is working.
We don't have the correct description of LPC memory BAR register yet, so
we have to use EMI (embedded memory interface) module for 0x800-0x9ff
region. This requires a slightly different protocol, which is in the
next CL.
BUG=chrome-os-partner:24107
TEST=Wire EVB to Stumpy. 'ectool hello' and 'ectool version' working.
BRANCH=None
Change-Id: I873b4a455cf692e479321a5c6e18c8f33df60e66
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178250
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/mec1322/registers.h')
| -rw-r--r-- | chip/mec1322/registers.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/chip/mec1322/registers.h b/chip/mec1322/registers.h index 5d6e09685e..8a134415f1 100644 --- a/chip/mec1322/registers.h +++ b/chip/mec1322/registers.h @@ -181,6 +181,14 @@ static inline uintptr_t gpio_port_base(int port_id) #define MEC1322_PWM_CFG(x) REG32(MEC1322_PWM_BASE(x) + 0x08) +/* ACPI */ +#define MEC1322_ACPI_EC_BASE(x) (0x400f0c00 + (x) * 0x400) +#define MEC1322_ACPI_EC_EC2OS(x, y) REG8(MEC1322_ACPI_EC_BASE(x) + 0x100 + (y)) +#define MEC1322_ACPI_EC_STATUS(x) REG8(MEC1322_ACPI_EC_BASE(x) + 0x104) +#define MEC1322_ACPI_EC_BYTE_CTL(x) REG8(MEC1322_ACPI_EC_BASE(x) + 0x105) +#define MEC1322_ACPI_EC_OS2EC(x, y) REG8(MEC1322_ACPI_EC_BASE(x) + 0x108 + (y)) + + /* IRQ Numbers */ #define MEC1322_IRQ_I2C_0 0 #define MEC1322_IRQ_I2C_1 1 |