diff options
| author | Vic Yang <victoryang@chromium.org> | 2014-06-19 14:00:32 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-06-26 06:48:37 +0000 |
| commit | ae15dc8ce512d58c7c7757ebfd12c3ca76eb4a08 (patch) | |
| tree | b798712447eeb1b752557df2832dc806e5374a65 /chip/mec1322/registers.h | |
| parent | 9ccfd4553e708a5df4be3aa18b97c75da3f6c1b9 (diff) | |
| download | chrome-ec-ae15dc8ce512d58c7c7757ebfd12c3ca76eb4a08.tar.gz | |
mec1322: Add SPI master driver
This allows us to use the two SPI ports as SPI master. Also, to save CPU
time on reading large amount of data, let's add an async interface for
SPI transaction.
BUG=chrome-os-partner:29805
TEST=Read manufacturer ID from SPI flash with sync/async interface
BRANCH=None
Change-Id: I427f4215602cccc55c4151f4116226b1e0ccc15e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204719
Diffstat (limited to 'chip/mec1322/registers.h')
| -rw-r--r-- | chip/mec1322/registers.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/chip/mec1322/registers.h b/chip/mec1322/registers.h index 8447816f78..2ed60c9db1 100644 --- a/chip/mec1322/registers.h +++ b/chip/mec1322/registers.h @@ -297,6 +297,17 @@ static inline uintptr_t gpio_port_base(int port_id) #define MEC1322_HTIMER_COUNT REG16(MEC1322_HTIMER_BASE + 0x8) +/* SPI */ +#define MEC1322_SPI_BASE(port) (0x40009400 + 0x80 * (port)) +#define MEC1322_SPI_AR(port) REG8(MEC1322_SPI_BASE(port) + 0x00) +#define MEC1322_SPI_CR(port) REG8(MEC1322_SPI_BASE(port) + 0x04) +#define MEC1322_SPI_SR(port) REG8(MEC1322_SPI_BASE(port) + 0x08) +#define MEC1322_SPI_TD(port) REG8(MEC1322_SPI_BASE(port) + 0x0c) +#define MEC1322_SPI_RD(port) REG8(MEC1322_SPI_BASE(port) + 0x10) +#define MEC1322_SPI_CC(port) REG8(MEC1322_SPI_BASE(port) + 0x14) +#define MEC1322_SPI_CG(port) REG8(MEC1322_SPI_BASE(port) + 0x18) + + /* DMA */ #define MEC1322_DMA_BASE 0x40002400 |