diff options
| author | Divya Jyothi <divya.jyothi@intel.com> | 2015-07-08 00:14:02 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-13 23:27:08 +0000 |
| commit | 56c5a9649625ce0d2d9d26947d85c78ab49165f1 (patch) | |
| tree | 31057eb77a5318ec7b6683ef905444f4198adc6d /chip/mec1322/system.c | |
| parent | fbc84dc56566f31d897b420232088ba341810ea2 (diff) | |
| download | chrome-ec-56c5a9649625ce0d2d9d26947d85c78ab49165f1.tar.gz | |
mec1322: Fix reset cause detection
Mec1322 cannot distinguish between Power-on and reset condition.
MEC1322_EC_WDT_CNT was used to determine the power-on condition.
VBAT_POR cannot not be used to distinguish no battery condition.
All of the feautures that need support need to determine VCC1_REST
which is used for reset considion. lfw and main code use the same
condition.
When VCC1_RESET is asserted we need to set the image type to
RO image for sysjump to work correctly. This in turn will affect
Recovery mode,software sync and Flashrom. All of these conditions
were tested with this patch.
BUG=chrome-os-partner:40526
TEST=Recovery mode,Software Sync,Flashrom
BRANCH=None
Change-Id: I65f2aa9f56863597116b875ea436d4413887b92b
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283605
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/mec1322/system.c')
| -rw-r--r-- | chip/mec1322/system.c | 38 |
1 files changed, 3 insertions, 35 deletions
diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c index e29d8ce247..c753a0ad43 100644 --- a/chip/mec1322/system.c +++ b/chip/mec1322/system.c @@ -26,20 +26,6 @@ enum hibdata_index { HIBDATA_INDEX_SAVED_RESET_FLAGS /* Saved reset flags */ }; -static int check_vcc1_por(void) -{ - /* - * WDT count resets on VCC1 POR. If we see WDT count = 0, we know - * POR has occurred, and we set WDT count to 1. - */ - if (MEC1322_EC_WDT_CNT == 0) { - MEC1322_EC_WDT_CNT = 1; - return 1; - } - - return 0; -} - static void check_reset_cause(void) { uint32_t status = MEC1322_VBAT_STS; @@ -53,28 +39,16 @@ static void check_reset_cause(void) MEC1322_PCR_CHIP_PWR_RST |= rst_sts; /* - * BIT[6:5] determine VCC1 reset and VBAT reset status. - * when Poweron watchdog is reset and both VCC1 and VBAT - * are set + * BIT[6] determine VCC1 reset */ - if ((rst_sts == (MEC1322_PWR_RST_STS_VCC1 | - MEC1322_PWR_RST_STS_VBAT)) - && check_vcc1_por()) - flags |= RESET_FLAG_POWER_ON; - - /* - * Check for only BIT 6 to determine VCC1_RST# and no - * change on VBAT status indicates this is VCC1_RST# - */ - if ((rst_sts & MEC1322_PWR_RST_STS_VCC1) && - !(rst_sts & MEC1322_PWR_RST_STS_VBAT)) + if (rst_sts & MEC1322_PWR_RST_STS_VCC1) flags |= RESET_FLAG_RESET_PIN; flags |= MEC1322_VBAT_RAM(HIBDATA_INDEX_SAVED_RESET_FLAGS); MEC1322_VBAT_RAM(HIBDATA_INDEX_SAVED_RESET_FLAGS) = 0; - if (status & (1 << 5) && !(flags & (RESET_FLAG_SOFT | + if ((status & MEC1322_VBAT_STS_WDT) && !(flags & (RESET_FLAG_SOFT | RESET_FLAG_HARD | RESET_FLAG_HIBERNATE))) flags |= RESET_FLAG_WATCHDOG; @@ -114,12 +88,6 @@ void system_pre_init(void) /* Deassert nSIO_RESET */ MEC1322_PCR_PWR_RST_CTL &= ~(1 << 0); - if (MEC1322_VBAT_RAM(HIBDATA_INDEX_SAVED_RESET_FLAGS) & - (RESET_FLAG_POWER_ON|RESET_FLAG_RESET_PIN)) - MEC1322_VBAT_RAM(MEC1322_IMAGETYPE_IDX) = 0; - - check_reset_cause(); - spi_enable(1); } |