diff options
author | Shawn Nematbakhsh <shawnn@chromium.org> | 2017-02-15 17:06:37 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-02-25 14:23:20 -0800 |
commit | 23bc38414ade30fb3e72ae8beefb657b47ca8288 (patch) | |
tree | a3bd50f2e039cee14e71a453190b4daaa5fc61c2 /chip/mec1322/system.c | |
parent | b7f8d9df654945827d6a21332e140ddecb8bdd1b (diff) | |
download | chrome-ec-23bc38414ade30fb3e72ae8beefb657b47ca8288.tar.gz |
pd: Store PD active state in battery-backed memory
Our previous idea to cut Rd for many reset cases cannot work if cr50
consistently resets the EC by asserting the reset pin shortly after
power-on. Therefore, make a decision based upon whether battery-backed
memory indicates we previously negotiated a PD power contract as a sink.
If we previously did not negotiate a contract, or if power was removed
from the device (causing battery-backed memory to wipe) then we can
assume that we don't have an active power contract.
BUG=chrome-os-partner:62952
BRANCH=reef
TEST=On reef, run "cutoff" on the console, reattach AC, and verify
device successfully wakes. Also verify Rp is dropped on console 'reboot'
and F3 + power from RW.
Change-Id: Ie300b9589cac6be7a69b77678bea6b1b6b25578c
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/443356
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/mec1322/system.c')
-rw-r--r-- | chip/mec1322/system.c | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c index 54ff2f45c8..4b2738e969 100644 --- a/chip/mec1322/system.c +++ b/chip/mec1322/system.c @@ -24,6 +24,8 @@ enum hibdata_index { HIBDATA_INDEX_SCRATCHPAD = 0, /* General-purpose scratchpad */ HIBDATA_INDEX_SAVED_RESET_FLAGS, /* Saved reset flags */ + HIBDATA_INDEX_PD0, /* USB-PD0 saved port state */ + HIBDATA_INDEX_PD1, /* USB-PD1 saved port state */ }; static void check_reset_cause(void) @@ -166,14 +168,26 @@ const char *system_get_chip_revision(void) return buf; } -int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) +static int bbram_idx_lookup(enum system_bbram_idx idx) { - enum hibdata_index hibdata; - switch (idx) { +#ifdef CONFIG_USB_PD_DUAL_ROLE + case SYSTEM_BBRAM_IDX_PD0: + return HIBDATA_INDEX_PD0; + case SYSTEM_BBRAM_IDX_PD1: + return HIBDATA_INDEX_PD1; +#endif default: - return EC_ERROR_UNIMPLEMENTED; + return -1; } +} + +int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) +{ + int hibdata = bbram_idx_lookup(idx); + + if (hibdata < 0) + return EC_ERROR_UNIMPLEMENTED; *value = MEC1322_VBAT_RAM(hibdata); return EC_SUCCESS; @@ -181,12 +195,10 @@ int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) int system_set_bbram(enum system_bbram_idx idx, uint8_t value) { - enum hibdata_index hibdata; + int hibdata = bbram_idx_lookup(idx); - switch (idx) { - default: + if (hibdata < 0) return EC_ERROR_UNIMPLEMENTED; - } MEC1322_VBAT_RAM(hibdata) = value; return EC_SUCCESS; |