diff options
| author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-11 15:57:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:55 -0700 |
| commit | bb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (patch) | |
| tree | f6ada087f62246c3a9547e649ac8846b0ed6d5ab /chip/mec1322/watchdog.c | |
| parent | 0bfc511527cf2aebfa163c63a1d028419ca0b0c3 (diff) | |
| download | chrome-ec-bb266fc26fc05d4ab22de6ad7bce5b477c9f9140.tar.gz | |
common: replace 1 << digits, with BIT(digits)
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/mec1322/watchdog.c')
| -rw-r--r-- | chip/mec1322/watchdog.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/chip/mec1322/watchdog.c b/chip/mec1322/watchdog.c index a92b57f8a2..07724ca5ee 100644 --- a/chip/mec1322/watchdog.c +++ b/chip/mec1322/watchdog.c @@ -16,9 +16,9 @@ void watchdog_reload(void) #ifdef CONFIG_WATCHDOG_HELP /* Reload the auxiliary timer */ - MEC1322_TMR16_CTL(0) &= ~(1 << 5); + MEC1322_TMR16_CTL(0) &= ~BIT(5); MEC1322_TMR16_CNT(0) = CONFIG_AUX_TIMER_PERIOD_MS; - MEC1322_TMR16_CTL(0) |= 1 << 5; + MEC1322_TMR16_CTL(0) |= BIT(5); #endif } DECLARE_HOOK(HOOK_TICK, watchdog_reload, HOOK_PRIO_DEFAULT); @@ -34,10 +34,10 @@ int watchdog_init(void) */ /* Stop the auxiliary timer if it's running */ - MEC1322_TMR16_CTL(0) &= ~(1 << 5); + MEC1322_TMR16_CTL(0) &= ~BIT(5); /* Enable auxiliary timer */ - MEC1322_TMR16_CTL(0) |= 1 << 0; + MEC1322_TMR16_CTL(0) |= BIT(0); val = MEC1322_TMR16_CTL(0); @@ -45,22 +45,22 @@ int watchdog_init(void) val = (val & 0xffff) | (47999 << 16); /* No auto restart */ - val &= ~(1 << 3); + val &= ~BIT(3); /* Count down */ - val &= ~(1 << 2); + val &= ~BIT(2); MEC1322_TMR16_CTL(0) = val; /* Enable interrupt from auxiliary timer */ MEC1322_TMR16_IEN(0) |= 1; task_enable_irq(MEC1322_IRQ_TIMER16_0); - MEC1322_INT_ENABLE(23) |= 1 << 0; - MEC1322_INT_BLK_EN |= 1 << 23; + MEC1322_INT_ENABLE(23) |= BIT(0); + MEC1322_INT_BLK_EN |= BIT(23); /* Load and start the auxiliary timer */ MEC1322_TMR16_CNT(0) = CONFIG_AUX_TIMER_PERIOD_MS; - MEC1322_TMR16_CNT(0) |= 1 << 5; + MEC1322_TMR16_CNT(0) |= BIT(5); #endif /* Set timeout. It takes 1007us to decrement WDG_CNT by 1. */ |