diff options
author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2016-11-17 22:06:06 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-01-21 10:03:45 -0800 |
commit | 44eb5829c6cc57e3448733abd2349de0cc562809 (patch) | |
tree | 8a9fd9af57aa31d4d435d7b40d045392f3c8f3c3 /chip/mec1322 | |
parent | 8e4d4291726831cc35b3991418331db9a247a98b (diff) | |
download | chrome-ec-44eb5829c6cc57e3448733abd2349de0cc562809.tar.gz |
intel_x86: Make common code for LPC S0 <-> S0ix transitions
BUG=chrome-os-partner:59141
BRANCH=none
TEST=Manually tested on Reef. System can enter and exit from S0iX
when LID is closed & opened respectively.
Change-Id: I5892da327c2dcdd400d5a7ade867bec1b80cbaa4
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/407047
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'chip/mec1322')
-rw-r--r-- | chip/mec1322/lpc.c | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index 3ce2717222..e5eae508ae 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -618,50 +618,3 @@ static int lpc_get_protocol_info(struct host_cmd_handler_args *args) DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO, lpc_get_protocol_info, EC_VER_MASK(0)); - -#ifdef CONFIG_POWER_S0IX -static void lpc_clear_host_events(void) -{ - while (lpc_query_host_event_state() != 0); -} - -/* - * In AP S0 -> S3 & S0ix transitions, - * the chipset_suspend is called. - * - * The chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON) - * is used to detect the S0ix transition. - * - * During S0ix entry, the wake mask for lid open is enabled. - * - */ -void lpc_enable_wake_mask_for_lid_open(void) -{ - if ((chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)) || - chipset_in_state(CHIPSET_STATE_STANDBY)) { - uint32_t mask = 0; - - mask = ((lpc_get_host_event_mask(LPC_HOST_EVENT_WAKE)) | - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN)); - - lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, mask); -} } - -/* - * In AP S0ix & S3 -> S0 transitions, - * the chipset_resume hook is called. - * - * During S0ix exit, the wake mask for lid open is disabled. - * All pending events are cleared - * - */ -void lpc_disable_wake_mask_for_lid_open(void) -{ - if ((chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)) || - chipset_in_state(CHIPSET_STATE_ON)) { - lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0); - lpc_clear_host_events(); - } -} - -#endif |