diff options
| author | Martin Roth <martinroth@chromium.org> | 2016-10-24 16:32:19 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-15 17:41:53 -0800 |
| commit | 897ce78bddb26557a686ab9e756fcf3d6c121271 (patch) | |
| tree | edde864d756a6e1133808118b8ae90c323ed4ade /chip/mec1322 | |
| parent | 64b57efebdb311126f3daaa97d49443308507b76 (diff) | |
| download | chrome-ec-897ce78bddb26557a686ab9e756fcf3d6c121271.tar.gz | |
Fix various misspellings in comments
No functional changes.
BUG=none
BRANCH=none
TEST=make buildall passes
Change-Id: Ie852feb8e3951975d99dce5a49c17f5f0e8bc791
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403417
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Diffstat (limited to 'chip/mec1322')
| -rw-r--r-- | chip/mec1322/clock.c | 2 | ||||
| -rw-r--r-- | chip/mec1322/lpc.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/chip/mec1322/clock.c b/chip/mec1322/clock.c index 0fcb411d23..1cb0bc4aaf 100644 --- a/chip/mec1322/clock.c +++ b/chip/mec1322/clock.c @@ -105,7 +105,7 @@ static void htimer_init(void) { MEC1322_INT_BLK_EN |= 1 << 17; MEC1322_INT_ENABLE(17) |= 1 << 20; /* GIRQ=17, aggregator bit = 20 */ - MEC1322_HTIMER_PRELOAD = 0; /* disable at begining */ + MEC1322_HTIMER_PRELOAD = 0; /* disable at beginning */ task_enable_irq(MEC1322_IRQ_HTIMER); } diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index 298a161762..3ce2717222 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -244,7 +244,7 @@ static void setup_lpc(void) /* Set up 8042 interface at 0x60/0x64 */ MEC1322_LPC_8042_BAR = 0x00608104; - /* Set up indication of Auxillary sts */ + /* Set up indication of Auxiliary sts */ MEC1322_8042_KB_CTRL |= 1 << 7; MEC1322_8042_ACT |= 1; @@ -630,7 +630,7 @@ static void lpc_clear_host_events(void) * the chipset_suspend is called. * * The chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON) - * is used to detect the S0ix transiton. + * is used to detect the S0ix transition. * * During S0ix entry, the wake mask for lid open is enabled. * |