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authorGwendal Grignou <gwendal@chromium.org>2019-03-11 16:07:55 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-03-26 04:42:56 -0700
commitac77140b7f4f42075d2377fc9d956a636b05aacf (patch)
treec64c6a30916ff741a2ab235141f7bd071cd54483 /chip/mec1322
parentbb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (diff)
downloadchrome-ec-ac77140b7f4f42075d2377fc9d956a636b05aacf.tar.gz
common: bit change 1 << constants with BIT(constants)
Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/mec1322')
-rw-r--r--chip/mec1322/gpio.c14
-rw-r--r--chip/mec1322/i2c.c2
2 files changed, 8 insertions, 8 deletions
diff --git a/chip/mec1322/gpio.c b/chip/mec1322/gpio.c
index c3b62ad583..4e532e75d0 100644
--- a/chip/mec1322/gpio.c
+++ b/chip/mec1322/gpio.c
@@ -42,7 +42,7 @@ void gpio_set_alternate_function(uint32_t port, uint32_t mask, int func)
if (func > 0)
val |= (func & 0x3) << 12;
MEC1322_GPIO_CTL(port, i) = val;
- mask &= ~(1 << i);
+ mask &= ~BIT(i);
}
}
@@ -81,7 +81,7 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
uint32_t val;
while (mask) {
i = GPIO_MASK_TO_NUM(mask);
- mask &= ~(1 << i);
+ mask &= ~BIT(i);
val = MEC1322_GPIO_CTL(port, i);
/*
@@ -150,8 +150,8 @@ int gpio_enable_interrupt(enum gpio_signal signal)
girq_id = int_map[port].girq_id;
bit_id = (port - int_map[port].port_offset) * 8 + i;
- MEC1322_INT_ENABLE(girq_id) |= (1 << bit_id);
- MEC1322_INT_BLK_EN |= (1 << girq_id);
+ MEC1322_INT_ENABLE(girq_id) |= BIT(bit_id);
+ MEC1322_INT_BLK_EN |= BIT(girq_id);
return EC_SUCCESS;
}
@@ -168,7 +168,7 @@ int gpio_disable_interrupt(enum gpio_signal signal)
girq_id = int_map[port].girq_id;
bit_id = (port - int_map[port].port_offset) * 8 + i;
- MEC1322_INT_DISABLE(girq_id) = (1 << bit_id);
+ MEC1322_INT_DISABLE(girq_id) = BIT(bit_id);
return EC_SUCCESS;
}
@@ -258,9 +258,9 @@ static void gpio_interrupt(int girq, int port_offset)
for (i = 0; i < GPIO_IH_COUNT && sts; ++i, ++g) {
bit = (g->port - port_offset) * 8 + __builtin_ffs(g->mask) - 1;
- if (sts & (1 << bit))
+ if (sts & BIT(bit))
gpio_irq_handlers[i](i);
- sts &= ~(1 << bit);
+ sts &= ~BIT(bit);
}
}
diff --git a/chip/mec1322/i2c.c b/chip/mec1322/i2c.c
index 2c22256d81..8c59be9a38 100644
--- a/chip/mec1322/i2c.c
+++ b/chip/mec1322/i2c.c
@@ -120,7 +120,7 @@ static void configure_controller(int controller, int kbps)
/* Enable interrupt */
MEC1322_I2C_CONFIG(controller) |= BIT(29); /* ENIDI */
- MEC1322_INT_ENABLE(12) |= (1 << controller);
+ MEC1322_INT_ENABLE(12) |= BIT(controller);
MEC1322_INT_BLK_EN |= BIT(12);
}