diff options
| author | Tinghan Shen <tinghan.shen@mediatek.com> | 2021-07-02 17:49:15 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-13 07:26:27 +0000 |
| commit | 215e4affd9797a0e975c38f66b0ec68396114871 (patch) | |
| tree | b54bebbdfe7178ffda602cff64d80ed4e5b09030 /chip/mt_scp/mt8195 | |
| parent | d3cb154936240d90ec8c0e3f16483d06cce87ba5 (diff) | |
| download | chrome-ec-215e4affd9797a0e975c38f66b0ec68396114871.tar.gz | |
chip/mt_scp: change uart clock to ULPOSC
Change UART clock to ULPOSC to keep SCP console alive when system
suspend.
BRANCH=none
BUG=b:189300514
TEST=make BOARD=cherry_scp
Change-Id: I144354fe946808c7ec68da4ea33e4ad11a7bf11f
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3003345
Tested-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
Diffstat (limited to 'chip/mt_scp/mt8195')
| -rw-r--r-- | chip/mt_scp/mt8195/uart.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/mt_scp/mt8195/uart.c b/chip/mt_scp/mt8195/uart.c index e8d29cf311..76674fa7d3 100644 --- a/chip/mt_scp/mt8195/uart.c +++ b/chip/mt_scp/mt8195/uart.c @@ -17,7 +17,7 @@ void uart_init_pinmux(void) { #if UARTN == 0 - SCP_UART_CK_SEL |= UART0_CK_SEL_VAL(UART_CK_SEL_26M); + SCP_UART_CK_SEL |= UART0_CK_SEL_VAL(UART_CK_SEL_ULPOSC); SCP_SET_CLK_CG |= CG_UART0_MCLK | CG_UART0_BCLK | CG_UART0_RST; /* set AP GPIO102 and GPIO103 to alt func 5 */ |