diff options
| author | Tinghan Shen <tinghan.shen@mediatek.com> | 2021-07-30 18:29:54 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-19 05:00:26 +0000 |
| commit | 2d836e59e2e2fe366b1450f82b233a1618e38493 (patch) | |
| tree | bdffa53a0570bef90edcf7ffe22e0f8d7e2f4c68 /chip/mt_scp/mt8195 | |
| parent | ae1691bec431da5d1015a3fddaddeef3f7661eae (diff) | |
| download | chrome-ec-2d836e59e2e2fe366b1450f82b233a1618e38493.tar.gz | |
chip/mt_scp: restore fmeter value
Fmeter is used to measure the clock speed on SoC.
SCP uses the fmeter with different config compared to kernel side clock
driver.
Restore the fmeter value to prevent wrong fmeter result for clock driver.
BUG=b:184793035
TEST=check fmeter result by following commands
echo 0 > /proc/sys/kernel/printk
clkdbg() { echo $@ > /proc/clkdbg; cat /proc/clkdbg; }
clkdbg set_parent vdec_sel mainpll_d4
clkdbg set_parent venc_sel univpll_d4
clkdbg fmeter
WAS:
64: hf_fvenc_ck : 312000
65: hf_fvdec_ck : 273000
IS:
64: hf_fvenc_ck : 624000
65: hf_fvdec_ck : 546000
Change-Id: If4d93b9b4e05258d0ad5f96953a99fd74acb6070
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3063107
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
Diffstat (limited to 'chip/mt_scp/mt8195')
| -rw-r--r-- | chip/mt_scp/mt8195/clock.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/chip/mt_scp/mt8195/clock.c b/chip/mt_scp/mt8195/clock.c index bf85af2254..9d341536a6 100644 --- a/chip/mt_scp/mt8195/clock.c +++ b/chip/mt_scp/mt8195/clock.c @@ -115,6 +115,10 @@ static uint32_t clock_ulposc_measure_freq(uint32_t osc) { uint32_t result = 0; int cnt; + uint32_t cali_0 = AP_CLK26CALI_0; + uint32_t cali_1 = AP_CLK26CALI_1; + uint32_t dbg_cfg = AP_CLK_DBG_CFG; + uint32_t misc_cfg = AP_CLK_MISC_CFG_0; /* Set ckgen_load_cnt: CLK26CALI_1[25:16] */ AP_CLK26CALI_1 = CFG_CKGEN_LOAD_CNT; @@ -148,6 +152,11 @@ static uint32_t clock_ulposc_measure_freq(uint32_t osc) } } + AP_CLK26CALI_0 = cali_0; + AP_CLK26CALI_1 = cali_1; + AP_CLK_DBG_CFG = dbg_cfg; + AP_CLK_MISC_CFG_0 = misc_cfg; + /* disable freq meter */ AP_CLK26CALI_0 &= ~CFG_FREQ_METER_ENABLE; |