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| author | Tinghan Shen <tinghan.shen@mediatek.com> | 2021-07-07 14:12:58 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-23 08:44:01 +0000 |
| commit | 7dd06acce250fc3d40db2c7615bf556de5c0ee5b (patch) | |
| tree | 07b95da06ad4aada5e82a23186077821361fa13f /chip/mt_scp/rv32i_common | |
| parent | b082671a40011d0cdeb2f8313447c91f8978699a (diff) | |
| download | chrome-ec-7dd06acce250fc3d40db2c7615bf556de5c0ee5b.tar.gz | |
chip/mt_scp: move video encode/decode IRQ to group 8
The IRQ triggering frequency of video encode/decode IRQ is propotional
to frame rate. Assign these IRQs with group 8 to prevent blocking IPI
IRQ handler (group 7).
BRANCH=none
BUG=b:189300514
TEST=make BOARD=cherry_scp
Change-Id: Iab7147fbecc02217656bef1493574461ad54cb29
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3010781
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
Tested-by: Tzung-Bi Shih <tzungbi@chromium.org>
Diffstat (limited to 'chip/mt_scp/rv32i_common')
| -rw-r--r-- | chip/mt_scp/rv32i_common/intc.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/chip/mt_scp/rv32i_common/intc.c b/chip/mt_scp/rv32i_common/intc.c index 9555dbf2f2..7e6b39e1f2 100644 --- a/chip/mt_scp/rv32i_common/intc.c +++ b/chip/mt_scp/rv32i_common/intc.c @@ -201,12 +201,12 @@ static struct { [SCP_IRQ_GCE] = { INTC_GRP_0 }, [SCP_IRQ_MDP_GCE] = { INTC_GRP_0 }, /* 36 */ - [SCP_IRQ_VDEC] = { INTC_GRP_0 }, + [SCP_IRQ_VDEC] = { INTC_GRP_8 }, [SCP_IRQ_WDT] = { INTC_GRP_0 }, - [SCP_IRQ_VDEC_LAT] = { INTC_GRP_0 }, - [SCP_IRQ_VDEC1] = { INTC_GRP_0 }, + [SCP_IRQ_VDEC_LAT] = { INTC_GRP_8 }, + [SCP_IRQ_VDEC1] = { INTC_GRP_8 }, /* 40 */ - [SCP_IRQ_VDEC1_LAT] = { INTC_GRP_0 }, + [SCP_IRQ_VDEC1_LAT] = { INTC_GRP_8 }, [SCP_IRQ_INFRA] = { INTC_GRP_0 }, [SCP_IRQ_CLK_CTRL_CORE] = { INTC_GRP_0 }, [SCP_IRQ_CLK_CTRL2_CORE] = { INTC_GRP_0 }, @@ -228,7 +228,7 @@ static struct { /* 56 */ [SCP_IRQ_I3C0_IBI_WAKE] = { INTC_GRP_0 }, [SCP_IRQ_I3C1_IBI_WAKE] = { INTC_GRP_0 }, - [SCP_IRQ_VENC] = { INTC_GRP_0 }, + [SCP_IRQ_VENC] = { INTC_GRP_8 }, [SCP_IRQ_APU_ENGINE] = { INTC_GRP_0 }, /* 60 */ [SCP_IRQ_MBOX0] = { INTC_GRP_0 }, @@ -264,7 +264,7 @@ static struct { [SCP_IRQ_JPEGENC] = { INTC_GRP_0 }, [SCP_IRQ_JPEGDEC] = { INTC_GRP_0 }, [SCP_IRQ_JPEGDEC_C2] = { INTC_GRP_0 }, - [SCP_IRQ_VENC_C1] = { INTC_GRP_0 }, + [SCP_IRQ_VENC_C1] = { INTC_GRP_8 }, /* 88 */ [SCP_IRQ_JPEGENC_C1] = { INTC_GRP_0 }, [SCP_IRQ_JPEGDEC_C1] = { INTC_GRP_0 }, |