diff options
| author | Nicolas Boichat <drinkcat@chromium.org> | 2018-03-26 08:56:39 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-05 03:50:18 -0700 |
| commit | 5873f302c445e82669af43ee6bfcf0b4109d067e (patch) | |
| tree | 6b827329d24699352d7e65eca368a99c5a6925e8 /chip/npcx/adc.c | |
| parent | d1d5dc162a8ddd6db0b71a3e95ede90b2d5e6ae6 (diff) | |
| download | chrome-ec-5873f302c445e82669af43ee6bfcf0b4109d067e.tar.gz | |
chip/npcx: Ensure software watchdog has highest priority
Before this change uart_ec_interrupt and software watchdog
interrupt handler both had priority 0. Since UART IRQ number is
33, and software watchdog is 44, the UART interrupt handler
would have higher prority.
Fix this by increasing all interrupt handler priorities, leaving
the software watchdog handler alone on priority 0.
BRANCH=eve,poppy,fizz
BUG=b:76391320
TEST=Cherry-pick CL:979736 (causes a watchdog in UART interrupt
handler), check that panicinfo contains a sensible PC in r5
after reset.
Change-Id: I97f99af5192a4a9571854a4d3f7c48a4674d605e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/979738
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/npcx/adc.c')
| -rw-r--r-- | chip/npcx/adc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/npcx/adc.c b/chip/npcx/adc.c index 6829a627a0..1712b889ab 100644 --- a/chip/npcx/adc.c +++ b/chip/npcx/adc.c @@ -161,7 +161,7 @@ void adc_interrupt(void) task_set_event(task_waiting, TASK_EVENT_ADC_DONE, 0); } } -DECLARE_IRQ(NPCX_IRQ_ADC, adc_interrupt, 3); +DECLARE_IRQ(NPCX_IRQ_ADC, adc_interrupt, 4); /** * ADC initial. |