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| author | CHLin <CHLIN56@nuvoton.com> | 2018-06-25 17:24:36 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-07-05 23:03:32 -0700 |
| commit | 44a4d92c3db539f14dd0003723f3a79040dc937a (patch) | |
| tree | 338e89df9991a4216e05ee6a3d8100b810a18f6e /chip/npcx/config_chip.h | |
| parent | 43c39eefb135de4fca4ba7b68321ee6516877d78 (diff) | |
| download | chrome-ec-44a4d92c3db539f14dd0003723f3a79040dc937a.tar.gz | |
npcx: uart: Add driver support for the second UART
Nuvoton NPCX79nxB serie chips include two UART ports.
In this CL, we add the driver support for these two UART modules.
Develoers can select one of the UART ports as EC console by configuring
"CONFIG_CONSOLE_UART" in board.h
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST="#define CONFIG_CONSOLE_UART 0"; build and flash image on npcx7 EVB;
check EC console working via J21.
TEST="#define CONFIG_CONSOLE_UART 1"; build and flash image on npcx7 EVB;
check EC console working via J22. (Note: J16.3-J16.5 and JP6.2-JP6.3
must be connected together.)
TEST=build images of board npcx_evb, poppy, and grunt, make sure EC
console is functional on these boards.
TEST=#define "CONFIG_CONSOLE_UART 0" and "CONFIG_UART_PAD_SWITCH" in
board.h; build and flash image on npcx7_evb. check uart_alt_pad_read_write
function still works by using the console command like:
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/659460/1/board/poppy/board.c
Change-Id: I7de91680e5d4f56c7cae66482c0953d8c324dbe7
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1113269
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/npcx/config_chip.h')
| -rw-r--r-- | chip/npcx/config_chip.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/chip/npcx/config_chip.h b/chip/npcx/config_chip.h index 9dac257850..e956e4cf6a 100644 --- a/chip/npcx/config_chip.h +++ b/chip/npcx/config_chip.h @@ -69,6 +69,8 @@ /* Chip needs to do custom pre-init */ #define CONFIG_CHIP_PRE_INIT +/* Default use UART1 as console */ +#define CONFIG_CONSOLE_UART 0 #define GPIO_PIN(port, index) GPIO_##port, (1 << index) #define GPIO_PIN_MASK(p, m) .port = GPIO_##p, .mask = (m) |