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authorRandall Spangler <rspangler@chromium.org>2016-09-14 16:48:23 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-09-23 12:21:51 -0700
commit818dea4a07337b96a696f805a207860abf979c8f (patch)
tree6d564d3e0a304360f95e0d3e200796845a83cff4 /chip/npcx/flash.c
parent5818cdc7286a37cf06d2f2c0d79b0f4ae5ee664c (diff)
downloadchrome-ec-818dea4a07337b96a696f805a207860abf979c8f.tar.gz
flash: Add command to get SPI flash chip info
Previously, there was no way to identify which flash chip was used by the EC, for ECs using an external SPI flash. Now, 'ectool flashinfo' will print more information about the SPI flash chip in these cases. BUG=chrome-os-partner:56765 BRANCH=any EC with MEC1322 or NPCX still going through factory TEST=define CONFIG_HOSTCMD_FLASH_SPI_INFO, then 'ectool flashspiinfo' on samus indicates no SPI flash info, and prints additional info on chell and kevin. Without the config defined, all platforms report no spi flash info. CQ-DEPEND=CL:386368 Change-Id: I3c162f7ad12ed4b30ab951c03f24476683382114 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/385702 Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/npcx/flash.c')
-rw-r--r--chip/npcx/flash.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c
index 2387a3a958..31e4c60f1a 100644
--- a/chip/npcx/flash.c
+++ b/chip/npcx/flash.c
@@ -6,6 +6,7 @@
/* Flash memory module for Chrome EC */
#include "flash.h"
+#include "host_command.h"
#include "registers.h"
#include "switch.h"
#include "system.h"
@@ -160,6 +161,39 @@ uint8_t flash_get_status2(void)
return NPCX_UMA_DB0;
}
+#ifdef CONFIG_HOSTCMD_FLASH_SPI_INFO
+
+void flash_get_mfr_dev_id(uint8_t *dest)
+{
+ /* Disable tri-state */
+ TRISTATE_FLASH(0);
+ /* Read manufacturer and device ID. Send cmd=0x90 + 24-bit address=0 */
+ flash_set_address(0);
+ flash_execute_cmd(CMD_READ_MAN_DEV_ID,
+ MASK_CMD_RD_2BYTE | MASK(A_SIZE));
+ /* Enable tri-state */
+ TRISTATE_FLASH(1);
+
+ dest[0] = NPCX_UMA_DB0;
+ dest[1] = NPCX_UMA_DB1;
+}
+
+void flash_get_jedec_id(uint8_t *dest)
+{
+ /* Disable tri-state */
+ TRISTATE_FLASH(0);
+ /* Read manufacturer and device ID */
+ flash_execute_cmd(CMD_READ_ID, MASK_CMD_RD_3BYTE);
+ /* Enable tri-state */
+ TRISTATE_FLASH(1);
+
+ dest[0] = NPCX_UMA_DB0;
+ dest[1] = NPCX_UMA_DB1;
+ dest[2] = NPCX_UMA_DB2;
+}
+
+#endif /* CONFIG_HOSTCMD_FLASH_SPI_INFO */
+
/*****************************************************************************/
/* flash protection functions */
/* Use a copy function of spi_flash.c in flash driver */
@@ -742,6 +776,31 @@ void flash_lock_mapped_storage(int lock)
}
/*****************************************************************************/
+/* Host commands */
+
+#if defined(CONFIG_HOSTCMD_FLASH_SPI_INFO) && !defined(BOARD_NPCX_EVB)
+/* NPCX EVB uses implementation from spi_flash.c */
+
+static int flash_command_spi_info(struct host_cmd_handler_args *args)
+{
+ struct ec_response_flash_spi_info *r = args->response;
+
+ flash_get_jedec_id(r->jedec);
+ r->reserved0 = 0;
+ flash_get_mfr_dev_id(r->mfr_dev_id);
+ r->sr1 = flash_get_status1();
+ r->sr2 = flash_get_status2();
+
+ args->response_size = sizeof(*r);
+ return EC_RES_SUCCESS;
+}
+DECLARE_HOST_COMMAND(EC_CMD_FLASH_SPI_INFO,
+ flash_command_spi_info,
+ EC_VER_MASK(0));
+
+#endif
+
+/*****************************************************************************/
/* Console commands */
static int command_flash_spi_sel_lock(int argc, char **argv)