diff options
| author | Aseda Aboagye <aaboagye@google.com> | 2020-01-03 12:20:15 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-01-03 23:22:07 +0000 |
| commit | cb0cfc0cbc42057b388b454a172bc4fde0f09a1f (patch) | |
| tree | d4a19e6fb60488cb01eaa44b6c0589df4dcaec51 /chip/npcx/flash.c | |
| parent | 8942f29ca874dafc70902f4283efbd52ad512f0f (diff) | |
| download | chrome-ec-cb0cfc0cbc42057b388b454a172bc4fde0f09a1f.tar.gz | |
npcx: Add support for CONFIG_WP_ACTIVE_HIGH
NPCX was missing support for an inverted write protect polarity, this
commit simply adds that support.
BUG=b:146172102
BRANCH=None
TEST=`make -j buildall`
Change-Id: I3324d7f7cfa268a2d55f87d3b1943717e26c856c
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986311
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'chip/npcx/flash.c')
| -rw-r--r-- | chip/npcx/flash.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c index b0cbca536f..5bb8d209b4 100644 --- a/chip/npcx/flash.c +++ b/chip/npcx/flash.c @@ -291,7 +291,11 @@ static int flash_set_status_for_prot(int reg1, int reg2) * internal spi-flash, protect it now before setting them. */ #ifdef NPCX_INT_FLASH_SUPPORT +#ifdef CONFIG_WP_ACTIVE_HIGH + flash_protect_int_flash(gpio_get_level(GPIO_WP)); +#else flash_protect_int_flash(!gpio_get_level(GPIO_WP_L)); +#endif /*_CONFIG_WP_ACTIVE_HIGH_*/ #endif /* Lock physical flash operations */ @@ -344,7 +348,11 @@ static int flash_check_prot_reg(unsigned int offset, unsigned int bytes) * internal spi-flash, protect it now. */ #ifdef NPCX_INT_FLASH_SUPPORT +#ifdef CONFIG_WP_ACTIVE_HIGH + flash_protect_int_flash(gpio_get_level(GPIO_WP)); +#else flash_protect_int_flash(!gpio_get_level(GPIO_WP_L)); +#endif /* CONFIG_WP_ACTIVE_HIGH */ #endif sr1 = flash_get_status1(); @@ -691,7 +699,11 @@ int flash_pre_init(void) * during ec initialization. */ #ifdef NPCX_INT_FLASH_SUPPORT +#ifdef CONFIG_WP_ACTIVE_HIGH + flash_protect_int_flash(gpio_get_level(GPIO_WP)); +#else flash_protect_int_flash(!gpio_get_level(GPIO_WP_L)); +#endif /*CONFIG_WP_ACTIVE_HIGH */ #endif #if !defined(NPCX_INT_FLASH_SUPPORT) |