diff options
| author | Edward Hill <ecgh@chromium.org> | 2018-01-22 12:46:36 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-09-04 16:53:49 -0700 |
| commit | 6b28dab8239564dd8024abf36b22dcb4b179c113 (patch) | |
| tree | df804dc3b6f31b8962a1a9fa7bbd5b145609c7e9 /chip/npcx/gpio.c | |
| parent | 571eb5939ef2f353cc16d725c3ce33100eab60ec (diff) | |
| download | chrome-ec-6b28dab8239564dd8024abf36b22dcb4b179c113.tar.gz | |
Add CONFIG_GPIO_INIT_POWER_ON_DELAY_MS
On power on, H1 releases the EC from reset but then quickly asserts and
releases the reset a second time (so that the EC comes out of reset the
second time after the SPI buffers have been configured by H1).
Add a delay so the EC can wait for this second reset before configuring
GPIO outputs, to avoid extra output toggles.
Unfortunate the timer is not set up by the time gpio_pre_init() is called,
so we add a new __hw_early_init_hwtimer() function to set it up so that
mdelay() worked. Without that, mdelay() hangs.
BUG=b:72132384
BRANCH=none
TEST=GPIO_OUT_HIGH has a single rising edge after power on
(before it would rise-fall-rise)
Check that mdelay(10) delays for about 10ms (actually perhaps a little
more using a scope line on KB_BL_EN
Change-Id: Iadc96fceb190e43ac0758f291f22e03aef81c379
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879353
Commit-Ready: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'chip/npcx/gpio.c')
| -rw-r--r-- | chip/npcx/gpio.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c index cabda69b15..7be79f4e54 100644 --- a/chip/npcx/gpio.c +++ b/chip/npcx/gpio.c @@ -22,6 +22,7 @@ #include "lpc_chip.h" #include "ec_commands.h" #include "host_command.h" +#include "hwtimer_chip.h" #if !(DEBUG_GPIO) #define CPUTS(...) @@ -402,6 +403,23 @@ void gpio_pre_init(void) system_check_bbram_on_reset(); is_warm = system_is_reboot_warm(); +#ifdef CONFIG_GPIO_INIT_POWER_ON_DELAY_MS + /* + * On power-on of some boards, H1 releases the EC from reset but then + * quickly asserts and releases the reset a second time. This means the + * EC sees 2 resets: (1) power-on reset, (2) reset-pin reset. If we add + * a delay between reset (1) and configuring GPIO output levels, then + * reset (2) will happen before the end of the delay so we avoid extra + * output toggles. + * + * Make sure to set up the timer before using udelay(). + */ + if (system_get_reset_flags() & RESET_FLAG_POWER_ON) { + __hw_early_init_hwtimer(0); + udelay(CONFIG_GPIO_INIT_POWER_ON_DELAY_MS * MSEC); + } +#endif + #ifdef CHIP_FAMILY_NPCX7 /* * TODO: Set bit 7 of DEVCNT again for npcx7 series. Please see Errata |