diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2021-10-11 12:50:25 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-11 00:40:12 +0000 |
commit | 2a856039445818b2bb3b89eff2e32376508db8b1 (patch) | |
tree | 8ccf997596ec053a646ad8a9163a7e6169c28283 /chip/npcx/hwtimer.c | |
parent | 42ec4b822e58fb70e38f073fa430ac23c1cd47c9 (diff) | |
download | chrome-ec-2a856039445818b2bb3b89eff2e32376508db8b1.tar.gz |
npcx/timer: Unroll udelayfirmware-nami-10775.108.B
This patch flattens udelay by unrolling __hw_clock_source_read.
This increases the chance that we record LR of the instruction
near which an infinite loop happened.
> battery 1 1000000
...
WATCHDOG PC=1008a76c / LR=1008c81f / pSP=200c44f8 (task 10) ###
Time: 0x0000000000f22630 us, 15.869488 s
Deadline: 0x0000000000f43946 -> 0.135958 s from now
Active timers:
Tsk 14 0x0000000000f43946 -> 0.135958
Task Ready Name Events Time (s) StkUsed
0 R << idle >> 00000001 4.840735 80/672
1 R HOOKS 80000000 0.788073 648/800
2 USB_CHG_P0 00000000 0.001591 312/672
3 USB_CHG_P1 00000000 0.004209 320/672
4 R CHARGER 40000000 0.103775 400/800
5 R MOTIONSENSE 80000004 0.098946 560/928
6 CHIPSET 00000000 0.000588 296/800
7 KEYPROTO 00000000 0.000019 128/672
8 PDCMD 00000000 0.001017 328/672
9 HOSTCMD 00000000 0.043613 336/800
10 R CONSOLE 00000000 2.342869 384/800
--- UART initialized after reboot ---
[Reset cause: watchdog]
[Image: RO, nami_v1.1.8956-b85666cd37 2021-11-10 15:07:11 some@host]
[0.003867 init buttons]
[0.004086 Inits done]
Restarting system with PMIC.
...
WATCHDOG PC=1008a76c / LR=1008c81f / task=10
r0 : r1 : r2 : r3 :
r4 :dead6664 r5 :1008a76c r6 :00000000 r7 :00000000
r8 :00000000 r9 :00000000 r10:00000000 r11:00000000
r12: sp :00000000 lr : pc :
mmfs = 0, shcsr = 0, hfsr = 10000028, dfsr = 0, ipsr = 1008c81f
BUG=b:200593658, b:205841546
BRANCH=
TEST=Run hacked battery command to trigger WDT on Sona. Verify the LR
points to command_battery instead of udelay. See above.
Change-Id: Ibd6cbcf18ab6d58c06ddfd19021058268289bf00
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3235653
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'chip/npcx/hwtimer.c')
-rw-r--r-- | chip/npcx/hwtimer.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c index e46a56fb1e..d9a5728942 100644 --- a/chip/npcx/hwtimer.c +++ b/chip/npcx/hwtimer.c @@ -16,6 +16,7 @@ #include "console.h" #include "task.h" #include "timer.h" +#include "registers.h" #include "util.h" /* Depth of event timer */ @@ -332,3 +333,24 @@ int __hw_clock_source_init(uint32_t start_t) return NPCX_IRQ_ITIM32; } + +/* + * Unrolled udelay. It preserves LR, which points to the root cause of WD crash. + */ +__override void udelay(unsigned us) +{ + uint32_t cnt, cnt2; + unsigned t0; + + cnt = NPCX_ITCNT32; + while ((cnt2 = NPCX_ITCNT32) != cnt) + cnt = cnt2; + + t0 = TICK_ITIM32_MAX_CNT - cnt; + + do { + cnt = NPCX_ITCNT32; + while ((cnt2 = NPCX_ITCNT32) != cnt) + cnt = cnt2; + } while (TICK_ITIM32_MAX_CNT - cnt - t0 <= us); +} |