nuc: Add all IC specific drivers of NPCX5M5G

Add npcx_evb in board folder for testing
Add shared-spi arch support in common layer.

Modified drivers for
1. Fan.c: console command “pwmduty”.
2. Pwm.c: for the issue when set duty to 0.
3. System.c: for hw reset only during system reset.
4. Flash.c: Fixed access denied bug of the flash driver for host command.
5. Comments from Patch Set 1
6. Comments from Patch Set 3 (except sha256.c)
7. Add openocd and flash_ec support for npcx_evb
8. Add little FW and spi-flash upload FW in chip folder
9. Add optional make rules for PROJECT_EXTRA
10.Replace CONFIG_SHRSPI_ARCH with CONFIG_CODERAM_ARCH and remove changes
   in common layer sources for shared-spi arch. (except sysjump)
11.Find the root cause of JTAG issue and use workaround method
   with SUPPORT_JTAG in clock.c
12 Execute hibernate in low power RAM for better power consumption
13 Add workaround method for version console command
14 Modified coding style issues by checkpatch.pl tool

BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none

Change-Id: I5e383420642de1643e2bead837a55c8c58481786
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233742

1 files changed, 28 insertions, 0 deletions

diff --git a/chip/npcx/hwtimer_chip.h b/chip/npcx/hwtimer_chip.h
new file mode 100644
index 0000000000..490d67b80d
--- /dev/null
+++ b/chip/npcx/hwtimer_chip.h
@@ -0,0 +1,28 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* NPCX-specific hwtimer module for Chrome EC */
+
+#ifndef HWTIMER_CHIP_H_
+#define HWTIMER_CHIP_H_
+
+/* Channel definition for ITIM16 */
+#define ITIM_TIME_NO	ITIM16_1
+#define ITIM_EVENT_NO	ITIM16_2
+#define ITIM_WDG_NO	ITIM16_5
+
+/* Clock source for ITIM16 */
+enum ITIM16_SOURCE_CLOCK_T {
+	ITIM16_SOURCE_CLOCK_APB2 = 0,
+	ITIM16_SOURCE_CLOCK_32K  = 1,
+};
+
+/* Initialize ITIM16 timer */
+void init_hw_timer(int itim_no, enum ITIM16_SOURCE_CLOCK_T source);
+
+/* Returns time delay cause of deep idle */
+uint32_t __hw_clock_get_sleep_time(void);
+
+#endif /* HWTIMER_CHIP_H_ */