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authorCHLin <CHLin56@nuvoton.com>2020-09-07 15:45:33 +0800
committerCommit Bot <commit-bot@chromium.org>2020-09-22 04:49:55 +0000
commit1ba3b3d64b0cc58c107a5d24079999deea0bb03b (patch)
treed5b7886e969655bb7c3b27b25f11d9e18b7109a6 /chip/npcx/hwtimer_chip.h
parentd03abea4c36062f922182b95e046fc6817e98eec (diff)
downloadchrome-ec-1ba3b3d64b0cc58c107a5d24079999deea0bb03b.tar.gz
npcx: change registers and hwtimer to support npcx9
This CL makes the following changes to support npcx9. 1. Split the CHIP_FAMILY specific register setting form register.h to register-npcx5.h and register-npcx7.h. 2. Add npcx9's specific register setting in registers-npcx9.h 3. In npcx9, all 16-bit timers are removed from ITIM module. Change the hwtimer driver to use 32-bit timer for npcx9. The table shows the supported and current use of ITIM modules in the system: NPCX5/7 NPCX9 Change-Id: I1d00cbb8d36bff37563cfeaf78e338286e779b00 -------------------|---------------------|--------------------| Supported ITIMs | ITIM16_1-ITIM16_6 | ITIM32_1-ITIM32_6 | | ITIM32 | | -------------------|---------------------|--------------------| System tick timer | ITIM32 | ITIM32_6 | -------------------|---------------------|--------------------| Event timer | ITIM16_1 | ITIM32_1 | -------------------|---------------------|--------------------| Watchdog timer | ITIM16_5 | ITIM32_5 | BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST=boot up EC on the npcx7/npcx9 EVB. Check HOOT_SECOND function is working; EC watchdog resets after console command "waitms 4000" TEST=build and flash image for yorp, no symptom occurred. Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: Ibf0fa5fa44590de6bb3e1bff677f40aafd70b556 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402840 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
Diffstat (limited to 'chip/npcx/hwtimer_chip.h')
-rw-r--r--chip/npcx/hwtimer_chip.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/chip/npcx/hwtimer_chip.h b/chip/npcx/hwtimer_chip.h
index b9e8bc2dce..987f3b52bd 100644
--- a/chip/npcx/hwtimer_chip.h
+++ b/chip/npcx/hwtimer_chip.h
@@ -8,10 +8,6 @@
#ifndef __CROS_EC_HWTIMER_CHIP_H
#define __CROS_EC_HWTIMER_CHIP_H
-/* Channel definition for ITIM */
-#define ITIM_EVENT_NO ITIM16_1
-#define ITIM_WDG_NO ITIM16_5
-
/* Use ITIM32 as main hardware timer */
#define TICK_ITIM32_MAX_CNT 0xFFFFFFFF
/* Maximum deadline of event */
@@ -28,7 +24,7 @@ enum ITIM_SOURCE_CLOCK_T {
*
* Select the source clock for a timer and prepare it for use.
*
- * @param itim_no Timer number to init (enum ITIM16_MODULE_T)
+ * @param itim_no Timer number to init (enum ITIM_MODULE_T)
* @param source Source for timer clock (enum ITIM_SOURCE_CLOCK_T)
*/
void init_hw_timer(int itim_no, enum ITIM_SOURCE_CLOCK_T source);