diff options
| author | CHLin <CHLin56@nuvoton.com> | 2020-09-09 11:22:57 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-09-25 16:56:49 +0000 |
| commit | 1639bd944d3a70479f18edcd0ee47fc6026f8127 (patch) | |
| tree | 7ef7906a58f1820f87c38b4fa254c3a0b2595464 /chip/npcx/i2c.c | |
| parent | cd2ce1213b08f8a2365407d39a005918190888b8 (diff) | |
| download | chrome-ec-1639bd944d3a70479f18edcd0ee47fc6026f8127.tar.gz | |
npcx: make required changes in some modules for npcx9
1. Functions are supported in npcx7 but npcx5 are guarded by:
"#if defined(CHIP_FAMILY_NPCX7)."
In npcx9, most of these functions are inherited. Change the guard to:
"#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7"
2. Configure APB4DIV in clock.c
3. In npcx5/7, the host interface type (HIF_TYP_SEL in the
DEVCNT register) is updated by booter after VCC1 Power-Up reset
according to VHIF voltage. In npcx9, the booter will not do this
anymore. Set the HIF_TYP_SEL filed at initialization in lpc.c anyway
to cover to all chip family.
4. Configure power down registers appropriately.
5 add symbolic links:
i2c-npcx9.c -> i2c_npcx5.c
system-npcx9.c -> system-npcx7.c
BRANCH=none
BUG=b:165777478
TEST=pass "make buildall"
TEST=with related CLs, build and flash image on the npcx7/9 EVB and
yorp, no symptom occurs.
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I17a71b7b90435d4a3ff75aac18bf2640b5b15515
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402843
Commit-Queue: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'chip/npcx/i2c.c')
| -rw-r--r-- | chip/npcx/i2c.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/chip/npcx/i2c.c b/chip/npcx/i2c.c index 8814f53994..9d72c80c71 100644 --- a/chip/npcx/i2c.c +++ b/chip/npcx/i2c.c @@ -144,7 +144,7 @@ const unsigned int i2c_1m_timing_used = ARRAY_SIZE(i2c_1m_timings); /* IRQ for each port */ const uint32_t i2c_irqs[I2C_CONTROLLER_COUNT] = { NPCX_IRQ_SMB1, NPCX_IRQ_SMB2, NPCX_IRQ_SMB3, NPCX_IRQ_SMB4, -#if defined(CHIP_FAMILY_NPCX7) +#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 NPCX_IRQ_SMB5, NPCX_IRQ_SMB6, NPCX_IRQ_SMB7, NPCX_IRQ_SMB8, #endif }; @@ -853,7 +853,7 @@ void i2c0_interrupt(void) { handle_interrupt(0); } void i2c1_interrupt(void) { handle_interrupt(1); } void i2c2_interrupt(void) { handle_interrupt(2); } void i2c3_interrupt(void) { handle_interrupt(3); } -#if defined(CHIP_FAMILY_NPCX7) +#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 void i2c4_interrupt(void) { handle_interrupt(4); } void i2c5_interrupt(void) { handle_interrupt(5); } void i2c6_interrupt(void) { handle_interrupt(6); } @@ -864,7 +864,7 @@ DECLARE_IRQ(NPCX_IRQ_SMB1, i2c0_interrupt, 4); DECLARE_IRQ(NPCX_IRQ_SMB2, i2c1_interrupt, 4); DECLARE_IRQ(NPCX_IRQ_SMB3, i2c2_interrupt, 4); DECLARE_IRQ(NPCX_IRQ_SMB4, i2c3_interrupt, 4); -#if defined(CHIP_FAMILY_NPCX7) +#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 DECLARE_IRQ(NPCX_IRQ_SMB5, i2c4_interrupt, 4); DECLARE_IRQ(NPCX_IRQ_SMB6, i2c5_interrupt, 4); DECLARE_IRQ(NPCX_IRQ_SMB7, i2c6_interrupt, 4); @@ -1020,7 +1020,7 @@ static void i2c_freq_changed(void) int ctrl = i2c_port_to_controller(i2c_ports[i].port); int scl_freq; -#ifdef CHIP_FAMILY_NPCX7 +#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 /* * SMB0/1/4/5/6/7 use APB3 clock * SMB2/3 use APB2 clock @@ -1106,7 +1106,7 @@ void i2c_init(void) /* Enable clock for I2C peripheral */ clock_enable_peripheral(CGC_OFFSET_I2C, CGC_I2C_MASK, CGC_MODE_RUN | CGC_MODE_SLEEP); -#if defined(CHIP_FAMILY_NPCX7) +#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 clock_enable_peripheral(CGC_OFFSET_I2C2, CGC_I2C_MASK2, CGC_MODE_RUN | CGC_MODE_SLEEP); #endif |