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authorMulin Chao <mlchao@nuvoton.com>2017-04-26 09:29:01 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-05-04 21:38:51 -0700
commit2b2478ec6bea2b0117c9ae9c2e610c12e16b5a2d (patch)
treeb87c385604f5c2962d2de0e3ee1b25cc0d68010c /chip/npcx/i2c_chip.h
parent2cd098a60baddcc31367796d9c5544ea1f090139 (diff)
downloadchrome-ec-2b2478ec6bea2b0117c9ae9c2e610c12e16b5a2d.tar.gz
npcx: i2c: Add support for npcx7 series ec
This CL added support for 8 i2c controllers and 11 i2c ports in npcx7 series ec. we also added i2c-npcx5/7.c and moved the functions related to chip family to them. (Such as i2c_port_to_controller(), i2c_select_port() and so on.) Note the layout and bit position of i2c registers which are accessed in these functions are irregular between npcx5 and npcx7. We think abstracting them from i2c.c is easier to maintain. In this CL, we also modified the checking rule for I2C_PORT_COUNT in task.h in order to prevent compiler error. So far, the ECs besides stm32 only use TASK_EVENT_I2C_IDLE to wait for i2c hardware completes its job. Put (I2C_PORT_COUNT > TASK_EVENT_MAX_I2C) checking rule for all ECs seems not suitable. It also includes 1. Remove useless NPCX_I2C_PUBIT macro function. 2. Remove useless NPCX_PWDWN_CTL_COUNT in registers.h. 3. Add CGC_OFFSET_I2C2 and CGC_I2C_MASK2 to power down the other 4 i2c controllers of npcx7 ec. BRANCH=none BUG=none TEST=No build errors for all boards using npcx5 series. Build poppy board and upload FW to platform. No issues found. All 8 i2c controllers and 10 ports (npcx796f supports PSL.) passed i2c stress tests on npcx796f evb. Change-Id: I2b5076d21bcd0f8d17fd811cad2ff7bd200b112a Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/487541 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/npcx/i2c_chip.h')
-rw-r--r--chip/npcx/i2c_chip.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/chip/npcx/i2c_chip.h b/chip/npcx/i2c_chip.h
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+++ b/chip/npcx/i2c_chip.h
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+/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* NPCX-specific I2C module for Chrome EC */
+
+#ifndef __CROS_EC_I2C_CHIP_H
+#define __CROS_EC_I2C_CHIP_H
+
+/**
+ * Select specific i2c port connected to i2c controller.
+ *
+ * @parm port I2C port
+ */
+void i2c_select_port(int port);
+
+/*
+ * Due to we couldn't support GPIO reading when IO is selected I2C, we need
+ * to distingulish which mode we used currently.
+ *
+ * @parm port I2C port
+ *
+ * @return 0: i2c ports are selected to pins. 1: GPIOs are selected to pins.
+ */
+int i2c_is_raw_mode(int port);
+
+#endif /* __CROS_EC_I2C_CHIP_H */