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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-05-11 10:16:41 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-12 20:54:37 +0000 |
| commit | 39bd18b890bb708e79e9ba50dd3b5bf3d35e9ff1 (patch) | |
| tree | 69b9331013e942bcbae05c10f863ad0ae9bc4f3b /chip/npcx/lfw/ec_lfw.c | |
| parent | 3a36c29e6756231f2fb1fdd26447d519cbd5b26a (diff) | |
| download | chrome-ec-39bd18b890bb708e79e9ba50dd3b5bf3d35e9ff1.tar.gz | |
cleanup: Rename image geometry CONFIGs
Rename image geometry configs with a uniform naming scheme to make their
purposes more clear.
CONFIG_RO_MEM_OFF (was CONFIG_FW_RO_OFF) - RO image offset in program memory
CONFIG_RO_STORAGE_OFF (was CONFIG_RO_SPI_OFF) - RO image offset on storage
CONFIG_RO_SIZE (was CONFIG_FW_RO_SIZE) - Size of RO image
CONFIG_RW_MEM_OFF (was CONFIG_FW_RW_OFF) - RW image offset in program memory
CONFIG_RW_STORAGE_OFF (was CONFIG_RW_SPI_OFF) - RW image offset on storage
CONFIG_RW_SIZE (was CONFIG_FW_RW_SIZE) - Size of RW image
CONFIG_WP_OFF (was CONFIG_FW_WP_RO_OFF) - Offset of WP region on storage
CONFIG_WP_SIZE (was CONFIG_FW_WP_RO_SIZE) - Size of WP region on storage
BUG=chrome-os-partner:39741,chrome-os-partner:23796
TEST=Set date / version strings to constants then `make buildall -j`.
Verify that each ec.bin image is identical pre- and post-change.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6ea0a4e456dae71c266fa917a309b9f6fa4b50cd
Reviewed-on: https://chromium-review.googlesource.com/270189
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'chip/npcx/lfw/ec_lfw.c')
| -rw-r--r-- | chip/npcx/lfw/ec_lfw.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/chip/npcx/lfw/ec_lfw.c b/chip/npcx/lfw/ec_lfw.c index e9710398f3..c3a505ce69 100644 --- a/chip/npcx/lfw/ec_lfw.c +++ b/chip/npcx/lfw/ec_lfw.c @@ -83,12 +83,12 @@ bin2ram(void) { /* copy image from RO base */ if (IS_BIT_SET(NPCX_FWCTRL, NPCX_FWCTRL_RO_REGION)) - flash_burst_copy_fw_to_mram(CONFIG_FW_RO_OFF, CONFIG_CDRAM_BASE, - CONFIG_FW_RO_SIZE - LFW_SIZE); + flash_burst_copy_fw_to_mram(CONFIG_RO_MEM_OFF, + CONFIG_CDRAM_BASE, CONFIG_RO_SIZE - LFW_SIZE); /* copy image from RW base */ else - flash_burst_copy_fw_to_mram(CONFIG_FW_RW_OFF, CONFIG_CDRAM_BASE, - CONFIG_FW_RW_SIZE - LFW_SIZE); + flash_burst_copy_fw_to_mram(CONFIG_RW_MEM_OFF, + CONFIG_CDRAM_BASE, CONFIG_RW_SIZE - LFW_SIZE); /* Disable FIU pins to tri-state */ CLEAR_BIT(NPCX_DEVCNT, NPCX_DEVCNT_F_SPI_TRIS); |