npcx: WoV: enhance the WoV driver and fix bugs

Firmware bugs fix:
----------------------------------------------------------------------
 1. wov mode change is malfunctional.
 2. wov_set_mic_source set in VAD_0.VAD_INSEL field 0x3 when requested
    wov_mic_source is WOV_SRC_STEREO.
 3. wov_set_mic_source doesn't disable I2S channel 1 when using only
    left or right channel.
 4. wov_start/stop_ram_capture is called when needed by the driver,
    it is used in wov_set_mode.
 5. Never activate Automatic wake-up enabled. VAD_0.VAD_ADC_WAKEUP
    remain '0' forever.
 6. Set DMIC clock signal output to use fast transitions.
    (set DEVALTE.DMCLK_FAST to be '1').
 7. for VAD and RAM modes, DMIC clock setting should be 750 KHz.
 8. for I2S mode (and RAM and I2S mode), DMIC clock should be 3 MHz.
 9. fix issue "WoV driver may cause unsynchronized data in the I2S output"
10. fMUL2 clock tuning to LFCLK reference remain enabled when FMUL2 is enabled.
11. core-FIFO status bits in WOV_STATUS register are cleared when FIFO is reset.
12. i2S-FIFO status bits in WOV_STATUS register are cleared when FIFO is reset.
13. reset I2S FIFO when FIFO is underrun.
14. increase delay to 1msec when resets the FIFOs.
15. set MIC source prior start capturing data.
16. fix issue "enables ADC path in VAD mode when it isn't needed"
17. Increase delay in all places from 10Usec to 100Usec

Firmware enhancement:
----------------------------------------------------------------------
1. Add support for DMIC clock rate of 750 KHz and 1.2 MHz.
2. Add console command to enable/disable fmul2 tunning.
     > wov fmul2 <enable|disable>
3. Originally, the console command "wov cfgmod ram" will tie the
function wov_set_mode(WOV_MODE_RAM) and start RAM capture together.
In the CL, we split it into two console commands:
    > wov cfgmod ram
    > wov capram
4. Add APIs to set DMIC clk rate for different mode (VAD/RAM/I2S) and
thier related console commands.
    > cfgdckV <0.75|1.0|1.2|2.4|3.0>
    > cfgdckR <0.75|1.0|1.2|2.4|3.0>
    > cfgdckI <0.75|1.0|1.2|2.4|3.0>

This change allows to modify setting (ex: fmul2 tunning on/off) after
the wov mode is set to RAM and before the voice capture to RAM starts.

BRANCH=none
BUG=b:74600211, b:74617334, b:72213375
TEST=No build errors for make buildall.
TEST=Test bugs described above are fixed.
TEST=Test enhancement described above is well functional.

Change-Id: Id97b51fbd3e6e495d48aedf000a427538d91adf7
Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com>
Signed-off-by: Simon Liang <CMLiang@nuvoton.com>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/942286
Commit-Ready: CH Lin <chlin56@nuvoton.corp-partner.google.com>
Tested-by: CH Lin <chlin56@nuvoton.corp-partner.google.com>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h
index be5f236a5b..01da6f658f 100644
--- a/chip/npcx/registers.h
+++ b/chip/npcx/registers.h
@@ -747,6 +747,7 @@ enum {
 #ifdef NPCX_WOV_SUPPORT
 #define NPCX_DEVALTE_WOV_SL              0
 #define NPCX_DEVALTE_I2S_SL              1
+#define NPCX_DEVALTE_DMCLK_FAST          2
 #endif
 
 /* Others bit definitions */