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| author | caveh jalali <caveh@chromium.org> | 2021-09-21 07:00:37 +0000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-09-21 08:35:37 +0000 |
| commit | d8e0677d61d059e6c80db0e526de495b7d94a22b (patch) | |
| tree | 0f4a92d9c695dc7c17e7f4809c5f330c5846c892 /chip/npcx/registers.h | |
| parent | f61e542f9871e9583e95b50599a9f41a9bf1024c (diff) | |
| download | chrome-ec-d8e0677d61d059e6c80db0e526de495b7d94a22b.tar.gz | |
Revert "npcx: correct the image copies indication bits for npcx9"
This reverts commit 20222d48571fa44c76fdb0ededd0ed042e9f8244.
Reason for revert: brya thinks it's in EC-RW when it's really still in EC-RO.
Original change's description:
> npcx: correct the image copies indication bits for npcx9
>
> In npcx5/7, we use two reserved bits in the BSC1 register (offset 0x07
> of the MDC register) to indicate what the current image copy is.
> In npcx9, these two bits are used by the booter. We need to change them
> to another two empty scratch bits which are not used by the booter.
>
> BUG=b:165777478
> BRANCH=none
> TEST=pass "make buildall"
> TEST=check the related bits changed by "sysump ro" and "sysjump rw"
>
> Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
> Change-Id: I6bcfe6d8752c6fa10022a21956d2e0ceb7f9418e
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153119
> Tested-by: CH Lin <chlin56@nuvoton.com>
> Reviewed-by: caveh jalali <caveh@chromium.org>
> Auto-Submit: CH Lin <chlin56@nuvoton.com>
> Commit-Queue: caveh jalali <caveh@chromium.org>
Bug: b:165777478
Change-Id: I24cdfec0d5c8cd998f087525ae21b2a3daea43a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3172266
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Tested-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'chip/npcx/registers.h')
| -rw-r--r-- | chip/npcx/registers.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h index f0c241e7f9..374e9d58ba 100644 --- a/chip/npcx/registers.h +++ b/chip/npcx/registers.h @@ -175,6 +175,14 @@ #define NPCX_IRQ_COUNT 64 /******************************************************************************/ +/* Miscellaneous Device Control (MDC) registers */ +#define NPCX_FWCTRL REG8(NPCX_MDC_BASE_ADDR + 0x007) + +/* MDC register fields */ +#define NPCX_FWCTRL_RO_REGION 0 +#define NPCX_FWCTRL_FW_SLOT 1 + +/******************************************************************************/ /* High Frequency Clock Generator (HFCG) registers */ #define NPCX_HFCGCTRL REG8(NPCX_HFCG_BASE_ADDR + 0x000) #define NPCX_HFCGML REG8(NPCX_HFCG_BASE_ADDR + 0x002) |