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authorMulin Chao <mlchao@nuvoton.com>2015-09-17 21:21:00 +0800
committerchrome-bot <chrome-bot@chromium.org>2015-09-21 20:50:56 -0700
commit95ea672601681d01166cf2b8c6cbd297dcc9295a (patch)
tree7731db4c2d1792e91671b248482a23dff9b24448 /chip/npcx/spiflashfw
parentb03f92fbccb4cd07edee75b6eea654692f3dbdf9 (diff)
downloadchrome-ec-95ea672601681d01166cf2b8c6cbd297dcc9295a.tar.gz
nuc: Fixed flash layout issue for npcx
Fixed flash layout issue for npcx Modified drivers: 1. config_flash_layout.h: Fixed layout issue for npcx 2. flash_ec: add flashrom support for boards without JTAG in servo connector BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I0b9b679c52b8a8e2a26c278b5024d0350fb77338 Reviewed-on: https://chromium-review.googlesource.com/300392 Commit-Ready: Mulin Chao <mlchao@nuvoton.com> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/npcx/spiflashfw')
-rw-r--r--chip/npcx/spiflashfw/ec_npcxflash.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/npcx/spiflashfw/ec_npcxflash.c b/chip/npcx/spiflashfw/ec_npcxflash.c
index ef62ac97dc..6f46a4374a 100644
--- a/chip/npcx/spiflashfw/ec_npcxflash.c
+++ b/chip/npcx/spiflashfw/ec_npcxflash.c
@@ -220,7 +220,7 @@ int sspi_flash_verify(int offset, int size, const char *data)
uint8_t *ptr_flash;
uint8_t *ptr_mram;
- ptr_flash = (uint8_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
+ ptr_flash = (uint8_t *)(CONFIG_MAPPED_STORAGE_BASE + offset);
ptr_mram = (uint8_t *)data;
result = 1;