diff options
| author | CHLin <CHLIN56@nuvoton.com> | 2017-06-21 17:23:14 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-06-29 22:01:15 -0700 |
| commit | 5e5788f3cac7fecd45072807bb6a79ce2b767961 (patch) | |
| tree | 12f32180357a81cf973883ab253e39261cef04c7 /chip/npcx/system.c | |
| parent | dc53959997a0ae25ea96d3ce89822305882efbf0 (diff) | |
| download | chrome-ec-5e5788f3cac7fecd45072807bb6a79ce2b767961.tar.gz | |
npcx: Clear IBBR to have BBRAM back to be functional
In the CL:505861, we print the warnning message to indicate that the VBAT
has ever dropped if the IBBR bit is set but do not clear the IBBR. This
forbid the access to BBRAM until EC power-on reset.
In this CL, we clear the IBBR bit to make BBRAM work again without the
need of EC power-on reset.
BRANCH=none
BUG=none
TEST=No build error for make buildall; Check warining messages are
printed and IBBR bit is cleared.
Change-Id: I58a0370c1c496b3c1208d9d5ac6b55c4d66fe8b6
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/542976
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/npcx/system.c')
| -rw-r--r-- | chip/npcx/system.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/chip/npcx/system.c b/chip/npcx/system.c index a3dad67bc5..d863c7b30c 100644 --- a/chip/npcx/system.c +++ b/chip/npcx/system.c @@ -85,24 +85,20 @@ static int bbram_is_byte_access(enum bbram_data_index index) ; } -/* Check and clear BBRAM status on power-on reset */ +/* Check and clear BBRAM status on any reset */ void system_check_bbram_on_reset(void) { - /* Check if power on reset */ - if ((!IS_BIT_SET(NPCX_RSTCTL, NPCX_RSTCTL_VCC1_RST_SCRATCH)) && - (!IS_BIT_SET(NPCX_RSTCTL, NPCX_RSTCTL_VCC1_RST_STS))) { - /* - * Clear IBBR bit because it's default value is 1 - * on reset whenever the VBAT supply is powered up. - */ - SET_BIT(NPCX_BKUP_STS, NPCX_BKUP_STS_IBBR); - } else { + if (IS_BIT_SET(NPCX_BKUP_STS, NPCX_BKUP_STS_IBBR)) { /* - * When the reset cause is other than power on reset, - * it is illegal if IBBR is set. + * If the reset cause is not power-on reset and VBAT has ever + * dropped, print a warning message. */ - if (IS_BIT_SET(NPCX_BKUP_STS, NPCX_BKUP_STS_IBBR)) + if (IS_BIT_SET(NPCX_RSTCTL, NPCX_RSTCTL_VCC1_RST_SCRATCH) || + IS_BIT_SET(NPCX_RSTCTL, NPCX_RSTCTL_VCC1_RST_STS)) CPRINTF("VBAT drop!\n"); + + /* Clear IBBR bit */ + SET_BIT(NPCX_BKUP_STS, NPCX_BKUP_STS_IBBR); } } @@ -115,7 +111,8 @@ static int bbram_valid(enum bbram_data_index index, int bytes) /* Check BBRAM is valid */ if (IS_BIT_SET(NPCX_BKUP_STS, NPCX_BKUP_STS_IBBR)) { - CPRINTF("IBBR set: BBRAM corrupted!\n"); + SET_BIT(NPCX_BKUP_STS, NPCX_BKUP_STS_IBBR); + panic_printf("IBBR set: BBRAM corrupted!\n"); return 0; } return 1; |