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author | Mulin Chao <MLChao@nuvoton.com> | 2018-04-24 11:48:10 +0800 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-27 12:22:39 -0700 |
commit | 9dd10a768521918d96af8d831f7b840ae6cb68bb (patch) | |
tree | 7eea288a2fa0e6b488b77d276d1a9ec62d154c71 /chip/npcx/system.c | |
parent | 1820ecce31e6a23e5ab79f708f66a8655da6a161 (diff) | |
download | chrome-ec-9dd10a768521918d96af8d831f7b840ae6cb68bb.tar.gz |
npcx: change chip variants of npcx7 series for better clarification.
In this CL, we changed chip variants npcx7m6xb to npcx7m6fb and npcx7m7w
to npcx7m7wb for better clafiication since it introduced new parameter
"b" for chip generation in the same family series.
In new npcx7 series naming rule, it follows:
Format: NPCX7(M)(N)(G/K/F)(B/C)
param M: 8: 128-pins package, 9: 144-pins package
param N: 5: 128KB RAM Size, 6: 256KB RAM Size, 7: 384KB RAM Size
param G/K/F/W: Google EC depends on specific features.
param B/C: Chip generation in npcx7. (Generation A is ignored. It
follows nameing rule in npcx5.)
The all chip variants of npcx7 used in boards are also listed below:
npcx7m6g - for npcx7 ec without internal flash on npcx_evb.
npcx7m6f - for npcx7 ec with internal flash.
npcx7m6fb - for npcx7 ec with internal flash, enhanced features.
npcx7m7wb - for npcx7 ec with internal flash, enhanced features + WOV.
BRANCH=none
BUG=none
TEST=No build errors for npcx7 series.
Change-Id: I896ee33209efa5d7157c90515005db5f36318c76
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1025471
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'chip/npcx/system.c')
-rw-r--r-- | chip/npcx/system.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/npcx/system.c b/chip/npcx/system.c index 059a75b6da..3c5b89c253 100644 --- a/chip/npcx/system.c +++ b/chip/npcx/system.c @@ -697,7 +697,7 @@ void system_pre_init(void) NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = pwdwn6; #if defined(CHIP_FAMILY_NPCX7) -#if defined(CHIP_VARIANT_NPCX7M7W) || defined(CHIP_VARIANT_NPCX7M6XB) +#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB) NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_7) = 0xE7; #else NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_7) = 0x07; |