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authorShawn Nematbakhsh <shawnn@chromium.org>2016-09-06 11:31:34 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-09-07 11:32:00 -0700
commit764b2e57e741b9d83fa603993ba80e0696fd1333 (patch)
tree5ea1f3e35bc27d83e1c11e5ed0b83c8a365657ee /chip/npcx
parent834207c4854a9f15e4deb9f3a7a03677feed7e68 (diff)
downloadchrome-ec-764b2e57e741b9d83fa603993ba80e0696fd1333.tar.gz
kevin: Use 32.768KHz input clock for improved RTC accuracy
BUG=chrome-os-partner:56949 BRANCH=None TEST=Run stopwatch for 10 minutes, verify 'rtc' time difference matches stopwatch. Change-Id: I3aed54b17433f9acfe284e9c8846d4e1e7c1a199 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/381571 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Diffstat (limited to 'chip/npcx')
-rw-r--r--chip/npcx/clock.c3
-rw-r--r--chip/npcx/gpio.c4
2 files changed, 7 insertions, 0 deletions
diff --git a/chip/npcx/clock.c b/chip/npcx/clock.c
index 725473cccb..f6a65cb02f 100644
--- a/chip/npcx/clock.c
+++ b/chip/npcx/clock.c
@@ -159,6 +159,9 @@ void clock_init(void)
/* Notify modules of frequency change */
hook_notify(HOOK_FREQ_CHANGE);
+
+ /* Configure alt. clock GPIOs (eg. optional 32KHz clock) */
+ gpio_config_module(MODULE_CLOCK, 1);
}
/**
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c
index 4e3b19e31c..8327a22c08 100644
--- a/chip/npcx/gpio.c
+++ b/chip/npcx/gpio.c
@@ -232,6 +232,7 @@ BUILD_ASSERT(sizeof(struct gpio_alt_map) == 2);
#define NPCX_ALT(grp, pin) { ALT_GROUP_##grp, NPCX_DEVALT##grp##_##pin, 0 }
#define NPCX_ALT_INV(grp, pin) { ALT_GROUP_##grp, NPCX_DEVALT##grp##_##pin, 1 }
+/* TODO: Index this table on GPIO# */
const struct gpio_alt_map gpio_alt_table[] = {
/* I2C Module */
{ NPCX_GPIO(B, 2), NPCX_ALT(2, I2C0_1_SL)}, /* SMB0SDA1 */
@@ -308,6 +309,9 @@ const struct gpio_alt_map gpio_alt_table[] = {
{ NPCX_GPIO(8, 3), NPCX_ALT_INV(9, NO_KSO15_SL)},/* KSO15 */
{ NPCX_GPIO(0, 3), NPCX_ALT_INV(A, NO_KSO16_SL)},/* KSO16 */
{ NPCX_GPIO(B, 1), NPCX_ALT_INV(A, NO_KSO17_SL)},/* KSO17 */
+ /* Clock module */
+ { NPCX_GPIO(7, 5), NPCX_ALT(A, 32K_OUT_SL)}, /* 32KHZ_OUT */
+ { NPCX_GPIO(E, 7), NPCX_ALT(A, 32KCLKIN_SL)}, /* 32KCLKIN */
};
struct gpio_lvol_item {