diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-05-21 16:23:32 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-05-25 15:15:04 +0000 |
| commit | 19bebb1d6e4fd2bd6882022435356c613fb38980 (patch) | |
| tree | 03e2a86d40f221ec729bb20329cb708d20c05804 /chip/npcx | |
| parent | 19fa9fbb9fb9372c31d902d48517a8bc1e3c3f17 (diff) | |
| download | chrome-ec-19bebb1d6e4fd2bd6882022435356c613fb38980.tar.gz | |
chip/npcx/espi: Fix race condition between PLTRST# and PCHANEN
The PLTRST# handler has a race condition. It sets the peripheral channel
ready bit before the IO ports are memory mapped. This means that the AP
can start sending IO requests before the mappings are ready.
BUG=b:188188172, b:188935533
BRANCH=none
TEST=On guybrush make an EC call after eSPI init. I no longer see a
failure. Also verify zork still boots.
Suggested-by: Rob Barnes <robbarnes@google.com>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I09c58ef989b8bb90d7662afc63d23dc5498c293b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2912090
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'chip/npcx')
| -rw-r--r-- | chip/npcx/espi.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index 2ab2606ecc..77e3f546ff 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -415,12 +415,12 @@ void espi_vw_evt_pltrst(void) /* Disable eSPI peripheral channel support first */ CLEAR_BIT(NPCX_ESPICFG, NPCX_ESPICFG_PCCHN_SUPP); - /* Enable eSPI peripheral channel */ - SET_BIT(NPCX_ESPICFG, NPCX_ESPICFG_PCHANEN); - /* Initialize host settings */ host_register_init(); + /* Enable eSPI peripheral channel */ + SET_BIT(NPCX_ESPICFG, NPCX_ESPICFG_PCHANEN); + /* Re-enable eSPI peripheral channel support */ SET_BIT(NPCX_ESPICFG, NPCX_ESPICFG_PCCHN_SUPP); } else { |