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| author | Jun Lin <CHLin56@nuvoton.com> | 2021-03-17 11:48:13 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-17 23:27:13 +0000 |
| commit | 3905cb1e2ab8361a48b5804a6a5f99336270d1d2 (patch) | |
| tree | b2aa13d82a5815a90a10f93909d6c5b0f802e833 /chip/npcx | |
| parent | 08cdfcfa7436c43b651ba3005ab77b0f263a71c9 (diff) | |
| download | chrome-ec-3905cb1e2ab8361a48b5804a6a5f99336270d1d2.tar.gz | |
npcx: eSPI: add a config to reset SLP_Sx VW when eSPI_RST asserts
It was observed that in byra, when the "apshutdown" console command is
executed, the power state of EC is messed up. This was caused by the
SLP_Sx virtual wire is not updated due to the ungraceful global reset.
This CL adds a config option to let npcx EC reset SLP_Sx VW when
eSPI_RST is asserted.
Note: don't enable this config if the platform implements deep Sx entry
(e.g. KBL) for the reason per Intel eSPI spec. (scenario 3 in Table 7):
These pins retain state (0 or 1) until PCH/SoC exits Deep-Sx and PMC
sends a VW message to the EC with the new states for these pins.
BRANCH=none
BUG=b:179977907
TEST=pass "make buildall"
TEST=With the config defined, see the SLP_S4 virtual wire reset when
eSPI_RST is asserted.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I413b3d211537295b32c49b6e4a1797e48a26ec5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2766428
Tested-by: CH Lin <chlin56@nuvoton.com>
Tested-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'chip/npcx')
| -rw-r--r-- | chip/npcx/espi.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index 9073838bd6..2ab2606ecc 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -62,7 +62,11 @@ struct vw_event_t { /* Default settings of VWEVMS registers (Please refer Table.43/44) */ static const struct vwevms_config_t espi_in_list[] = { /* IDX EN ENPL ENESP IE/WE VW Event Bit 0 - 3 (M->S) */ +#ifdef CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST + {0x02, 1, 0, 1, 1}, /* SLP_S3#, SLP_S4#, SLP_S5#, Reserve */ +#else {0x02, 1, 0, 0, 1}, /* SLP_S3#, SLP_S4#, SLP_S5#, Reserve */ +#endif {0x03, 1, 0, 1, 1}, /* SUS_STAT#, PLTRST#, ORST_WARN, Reserve */ {0x07, 1, 1, 1, 1}, /* HRST_WARN, SMIOUT#, NMIOUT#, Reserve */ {0x41, 1, 0, 1, 1}, /* SUS_WARN#, SPWRDN_ACK, Reserve, SLP_A# */ |