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authorTom Hughes <tomhughes@chromium.org>2021-01-26 11:36:48 -0800
committerCommit Bot <commit-bot@chromium.org>2021-01-28 01:08:04 +0000
commitb5a0fdab0680fd93b0b7b08a139a5fdcbb679ee6 (patch)
treee950d8969881d4f8b8978b349b94b9c7085eb3e5 /chip/npcx
parentc60037148c629e4947b67287b88c3abf701e2040 (diff)
downloadchrome-ec-b5a0fdab0680fd93b0b7b08a139a5fdcbb679ee6.tar.gz
spi: Pass in spi_device as argument to spi_enable instead of port
Rather than passing in the port and iterating over the global spi_devices variable, pass in the specific spi_device that is being enabled/disabled. The spi_device_t struct has the port. This change makes the functions in spi.h more consistent since they now all take a spi_device_t*. This change is the first step in making the SPI configuration more dynamic. BRANCH=none BUG=b:177908650 TEST=git grep 'spi_enable(CONFIG' => no results TEST=make buildall TEST=Flash dragonclaw v0.2 and view console to verify FP sensor ID Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I64124e0ebcf898e88496acb77703b5f59ae931c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654081 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'chip/npcx')
-rw-r--r--chip/npcx/spi.c38
1 files changed, 15 insertions, 23 deletions
diff --git a/chip/npcx/spi.c b/chip/npcx/spi.c
index 6ac8fe1b9e..9f6195ad36 100644
--- a/chip/npcx/spi.c
+++ b/chip/npcx/spi.c
@@ -68,13 +68,12 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, spi_freq_changed, HOOK_PRIO_FIRST);
/**
* Set SPI enabled.
*
- * @spi_port port to act on. Only one port supported, one gpio.
+ * @spi_device SPI device to act on.
* @param enable enabled flag
* @return success
*/
-int spi_enable(int port, int enable)
+int spi_enable(const struct spi_device_t *spi_device, int enable)
{
- int i;
enum gpio_signal gpio;
if (enable) {
@@ -83,28 +82,21 @@ int spi_enable(int port, int enable)
/* GPIO No SPI Select */
CLEAR_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_GPIO_NO_SPIP);
- for (i = 0; i < spi_devices_used; i++) {
- if (spi_devices[i].port != port)
- continue;
- gpio = spi_devices[i].gpio_cs;
- /* Make sure CS# is a GPIO output mode. */
- gpio_set_flags(gpio, GPIO_OUTPUT);
- /* Make sure CS# is deselected */
- gpio_set_level(gpio, 1);
- }
+ gpio = spi_device->gpio_cs;
+ /* Make sure CS# is in GPIO output mode. */
+ gpio_set_flags(gpio, GPIO_OUTPUT);
+ /* Make sure CS# is deselected */
+ gpio_set_level(gpio, 1);
+
/* Enabling spi module */
SET_BIT(NPCX_SPI_CTL1, NPCX_SPI_CTL1_SPIEN);
} else {
/* Disabling spi module */
CLEAR_BIT(NPCX_SPI_CTL1, NPCX_SPI_CTL1_SPIEN);
- for (i = 0; i < spi_devices_used; i++) {
- if (spi_devices[i].port != port)
- continue;
- gpio = spi_devices[i].gpio_cs;
- /* Make sure CS# is deselected */
- gpio_set_level(gpio, 1);
- gpio_set_flags(gpio, GPIO_ODR_HIGH);
- }
+ gpio = spi_device->gpio_cs;
+ /* Make sure CS# is deselected */
+ gpio_set_level(gpio, 1);
+ gpio_set_flags(gpio, GPIO_ODR_HIGH);
/* Disabling spi module for gpio configuration */
gpio_config_module(MODULE_SPI, 0);
/* GPIO No SPI Select */
@@ -196,7 +188,7 @@ static void spi_init(void)
/* Disabling spi module */
for (i = 0; i < spi_devices_used; i++)
- spi_enable(spi_devices[i].port, 0);
+ spi_enable(&spi_devices[i], 0);
/* Disabling spi irq */
CLEAR_BIT(NPCX_SPI_CTL1, NPCX_SPI_CTL1_EIR);
@@ -249,7 +241,7 @@ static int command_spirom(int argc, char **argv)
uint8_t txsr1[] = {0x05};
uint8_t txsr2[] = {0x35};
- spi_enable(CONFIG_SPI_FLASH_PORT, 1);
+ spi_enable(SPI_FLASH_DEVICE, 1);
printrx("Man/Dev ID", txmandev, sizeof(txmandev), 2);
printrx("JEDEC ID", txjedec, sizeof(txjedec), 3);
@@ -257,7 +249,7 @@ static int command_spirom(int argc, char **argv)
printrx("Status reg 1", txsr1, sizeof(txsr1), 1);
printrx("Status reg 2", txsr2, sizeof(txsr2), 1);
- spi_enable(CONFIG_SPI_FLASH_PORT, 0);
+ spi_enable(SPI_FLASH_DEVICE, 0);
return EC_SUCCESS;
}