diff options
| author | Myles Watson <mylesgw@chromium.org> | 2015-02-26 15:48:38 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-07-20 22:22:06 -0700 |
| commit | 4e920054f9a32ad1843fb6adc48a6a94ef4fb8ff (patch) | |
| tree | 87ea77c8836c62685aff660458c96d1911efb7e1 /chip/nrf51/build.mk | |
| parent | 1e53ce006cf1b58ec3a74af05c975255967de320 (diff) | |
| download | chrome-ec-4e920054f9a32ad1843fb6adc48a6a94ef4fb8ff.tar.gz | |
nrf51: Add PPI wrappers
Programmable Peripheral Interconnect is a shared resource.
This CL adds code for allocating PPIs to devices.
BUG=None
BRANCH=None
TEST=Modify the I2C code to use this PPI allocation code and test
I2C communication (using experimental MXT touch controller code)
Change-Id: I8ec27867d041982ef18e8515d6434c5de2c189c5
Signed-off-by: Myles Watson <mylesgw@google.com>
Reviewed-on: https://chromium-review.googlesource.com/361405
Commit-Ready: Myles Watson <mylesgw@chromium.org>
Tested-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Levi Oliver <levio@google.com>
Diffstat (limited to 'chip/nrf51/build.mk')
| -rw-r--r-- | chip/nrf51/build.mk | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/nrf51/build.mk b/chip/nrf51/build.mk index ddfa46b078..db64c6f618 100644 --- a/chip/nrf51/build.mk +++ b/chip/nrf51/build.mk @@ -11,7 +11,7 @@ CORE:=cortex-m0 CFLAGS_CPU+=-march=armv6-m -mcpu=cortex-m0 chip-y+=gpio.o system.o uart.o -chip-y+=jtag.o watchdog.o +chip-y+=jtag.o watchdog.o ppi.o chip-$(CONFIG_COMMON_TIMER)+=hwtimer.o clock.o chip-$(CONFIG_I2C)+=i2c.o |