diff options
author | Jett Rink <jettrink@chromium.org> | 2018-06-08 16:10:31 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-11 17:29:48 -0700 |
commit | 7d36fb8991e7a249ae56db508078480c27914f2e (patch) | |
tree | bac641d2be2a906670a1a882040c0cece711e948 /chip/nrf51 | |
parent | 7c6f336362770c85a5df02064fd274eee1ff8555 (diff) | |
download | chrome-ec-7d36fb8991e7a249ae56db508078480c27914f2e.tar.gz |
gpio: extend flags size to accommodate GPIO_ flags
Widen the flags field from 16-bit to 32-bit to fit all of the
current GPIO_flags. Also reorder fields within struct to allow arm
compiler to use 16-bit instructions instead of 32-bit instructions when
accessing fields (which is important for kevin board, otherwise
it runs out of space)
Lastly, re-tool macros to all reordering of gpio_alt_func struct fields.
BRANCH=none
BUG=b:109884927
TEST=builds on all boards
Change-Id: I20b136c94a607c19031a88bddd255cc34cc57bbd
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1096018
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'chip/nrf51')
-rw-r--r-- | chip/nrf51/config_chip.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/nrf51/config_chip.h b/chip/nrf51/config_chip.h index f14f292f77..374101d1bb 100644 --- a/chip/nrf51/config_chip.h +++ b/chip/nrf51/config_chip.h @@ -58,7 +58,7 @@ #define CONFIG_UART_TX_BUF_SIZE 1024 #define GPIO_PIN(port, index) GPIO_##port, (1 << index) -#define GPIO_PIN_MASK(port, mask) GPIO_##port, (mask) +#define GPIO_PIN_MASK(p, m) .port = GPIO_##p, .mask = (m) #endif /* __CROS_EC_CONFIG_CHIP_H */ |