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| author | Philip Chen <philipchen@google.com> | 2018-02-28 17:13:18 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-02 15:47:00 -0800 |
| commit | 6589e15e424f6a56f370a89e322240a1375839c7 (patch) | |
| tree | 4be6e3e85941c9e53f8491575e85f294699e9c10 /chip/stm32/adc-stm32f0.c | |
| parent | 69c18ad6a6a77ea1c82465e6420280c8cf55b12f (diff) | |
| download | chrome-ec-6589e15e424f6a56f370a89e322240a1375839c7.tar.gz | |
scarlet: Turn off ADC after board version is read
We can turn off ADC after the first successful read for board version.
A few milliwatts saved is important when Scarlet is in S3.
BUG=b:72160379
BRANCH=scarlet
TEST=Try 'version' command a few times on EC console and see
correct board version.
Change-Id: Id2bef415f161431ed895f49db30d50347479176d
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/942377
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Derek Basehore <dbasehore@chromium.org>
Diffstat (limited to 'chip/stm32/adc-stm32f0.c')
| -rw-r--r-- | chip/stm32/adc-stm32f0.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c index cffae10fd9..fd9711d44a 100644 --- a/chip/stm32/adc-stm32f0.c +++ b/chip/stm32/adc-stm32f0.c @@ -284,6 +284,16 @@ int adc_read_channel(enum adc_channel ch) return value * adc->factor_mul / adc->factor_div + adc->shift; } +void adc_disable(void) +{ + STM32_ADC_CR |= STM32_ADC_CR_ADDIS; + /* + * Note that the ADC is not in OFF state immediately. + * Once the ADC is effectively put into OFF state, + * STM32_ADC_CR_ADDIS bit will be cleared by hardware. + */ +} + static void adc_init(void) { /* |