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| author | Moritz Fischer <moritz.fischer@ettus.com> | 2018-09-10 13:45:30 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-09-28 06:26:08 -0700 |
| commit | acfd14a3345e7b7fa3fd3520c5b399fe6229d3cc (patch) | |
| tree | a41ec808656f67abe2431aa1acff4f7f86875930 /chip/stm32/adc-stm32f4.c | |
| parent | 78ea73cde13cda17a9b6240cc0b288c95a2f6482 (diff) | |
| download | chrome-ec-acfd14a3345e7b7fa3fd3520c5b399fe6229d3cc.tar.gz | |
Make ADCs on STM32F4 work
Make ADCs on STM32F4 chips work by reusing most of the STM32F3 code
with the addition of SWSTART=1 bit in adc_read_channel.
The SWSTART=1 is most likely also required for the F3, but could
not be tested on actual hardware.
BUG=none
BRANCH=master
TEST=Build for nucleo-411RE and check measurements
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Change-Id: Iea4f961b22119b5f2c1ee71295ec3ef1b7b7232c
Reviewed-on: https://chromium-review.googlesource.com/1217603
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Diffstat (limited to 'chip/stm32/adc-stm32f4.c')
| l--------- | chip/stm32/adc-stm32f4.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chip/stm32/adc-stm32f4.c b/chip/stm32/adc-stm32f4.c new file mode 120000 index 0000000000..5e375b9dbf --- /dev/null +++ b/chip/stm32/adc-stm32f4.c @@ -0,0 +1 @@ +adc-stm32f3.c
\ No newline at end of file |