diff options
| author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-11 15:57:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:55 -0700 |
| commit | bb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (patch) | |
| tree | f6ada087f62246c3a9547e649ac8846b0ed6d5ab /chip/stm32/clock-stm32f0.c | |
| parent | 0bfc511527cf2aebfa163c63a1d028419ca0b0c3 (diff) | |
| download | chrome-ec-bb266fc26fc05d4ab22de6ad7bce5b477c9f9140.tar.gz | |
common: replace 1 << digits, with BIT(digits)
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/stm32/clock-stm32f0.c')
| -rw-r--r-- | chip/stm32/clock-stm32f0.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/chip/stm32/clock-stm32f0.c b/chip/stm32/clock-stm32f0.c index 26188d97fd..24da104c3d 100644 --- a/chip/stm32/clock-stm32f0.c +++ b/chip/stm32/clock-stm32f0.c @@ -113,11 +113,11 @@ void config_hispeed_clock(void) { #ifdef CHIP_FAMILY_STM32F3 /* Ensure that HSE is ON */ - if (!(STM32_RCC_CR & (1 << 17))) { + if (!(STM32_RCC_CR & BIT(17))) { /* Enable HSE */ - STM32_RCC_CR |= 1 << 16; + STM32_RCC_CR |= BIT(16); /* Wait for HSE to be ready */ - while (!(STM32_RCC_CR & (1 << 17))) + while (!(STM32_RCC_CR & BIT(17))) ; } @@ -186,11 +186,11 @@ defined(CHIP_VARIANT_STM32F070) ; #else /* Ensure that HSI48 is ON */ - if (!(STM32_RCC_CR2 & (1 << 17))) { + if (!(STM32_RCC_CR2 & BIT(17))) { /* Enable HSI */ - STM32_RCC_CR2 |= 1 << 16; + STM32_RCC_CR2 |= BIT(16); /* Wait for HSI to be ready */ - while (!(STM32_RCC_CR2 & (1 << 17))) + while (!(STM32_RCC_CR2 & BIT(17))) ; } |