diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2017-08-13 13:16:38 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-18 16:46:34 -0700 |
| commit | 3cbdff8b1bc3f8621a1c6801340c45b0951aee17 (patch) | |
| tree | c9585128735c06d6d6cf94ebe066ca21f2f021c8 /chip/stm32/clock-stm32f4.c | |
| parent | b6d83d456f0293f329c34c5005c578d87a7cf7cc (diff) | |
| download | chrome-ec-3cbdff8b1bc3f8621a1c6801340c45b0951aee17.tar.gz | |
stm32: add embryonic support for STM32F76x
The STM32F76x is really close to the STM32F4 family, so the most concise
implementation is just using CHIP_FAMILY_STM32F4 and adding
CHIP_VARIANT_F76X.
Tune the clock settings to 180 Mhz CPU clock as the goal is performance.
(over-drive is not implemented yet to get to 216 Mhz)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=ran on nucleo-f767zi board.
'make BOARD=nucleo-f767 flash', the red LED is on and the green LED
turns on/off when pressing the user button, UART console works properly.
Change-Id: I1f67df3aec874c965c81188df46c72de210728d9
Reviewed-on: https://chromium-review.googlesource.com/612750
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/stm32/clock-stm32f4.c')
| -rw-r--r-- | chip/stm32/clock-stm32f4.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/chip/stm32/clock-stm32f4.c b/chip/stm32/clock-stm32f4.c index 3c9f79f4c7..64f3d331e2 100644 --- a/chip/stm32/clock-stm32f4.c +++ b/chip/stm32/clock-stm32f4.c @@ -70,7 +70,7 @@ void config_hispeed_clock(void) #endif int plldiv, pllinputclock; int pllmult, vcoclock; - int systemdivq, systemclock; + int systemclock; int usbdiv; int i2sdiv; @@ -95,8 +95,7 @@ void config_hispeed_clock(void) vcoclock = pllinputclock * pllmult; /* CPU/System clock */ - systemclock = vcoclock / 4; - systemdivq = 1; + systemclock = vcoclock / STM32F4_PLLP_DIV; /* USB clock = 48MHz exactly */ usbdiv = (vcoclock + (STM32F4_USB_REQ / 2)) / STM32F4_USB_REQ; assert(vcoclock / usbdiv == STM32F4_USB_REQ); @@ -147,7 +146,7 @@ void config_hispeed_clock(void) STM32_RCC_PLLCFGR = PLLCFGR_PLLM(plldiv) | PLLCFGR_PLLN(pllmult) | - PLLCFGR_PLLP(systemdivq) | + PLLCFGR_PLLP(STM32F4_PLLP_DIV / 2 - 1) | #if defined(CONFIG_STM32_CLOCK_HSE_HZ) PLLCFGR_PLLSRC_HSE | #else |