diff options
| author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-11 15:57:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:55 -0700 |
| commit | bb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (patch) | |
| tree | f6ada087f62246c3a9547e649ac8846b0ed6d5ab /chip/stm32/clock-stm32h7.c | |
| parent | 0bfc511527cf2aebfa163c63a1d028419ca0b0c3 (diff) | |
| download | chrome-ec-bb266fc26fc05d4ab22de6ad7bce5b477c9f9140.tar.gz | |
common: replace 1 << digits, with BIT(digits)
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/stm32/clock-stm32h7.c')
| -rw-r--r-- | chip/stm32/clock-stm32h7.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c index 95d9b1e96c..30faa0035a 100644 --- a/chip/stm32/clock-stm32h7.c +++ b/chip/stm32/clock-stm32h7.c @@ -249,8 +249,8 @@ static void low_power_init(void) task_enable_irq(STM32_IRQ_LPTIM1); /* Wake-up interrupts from EXTI for USART and LPTIM */ - STM32_EXTI_CPUIMR1 |= 1 << 26; /* [26] wkup26: USART1 wake-up */ - STM32_EXTI_CPUIMR2 |= 1 << 15; /* [15] wkup47: LPTIM1 wake-up */ + STM32_EXTI_CPUIMR1 |= BIT(26); /* [26] wkup26: USART1 wake-up */ + STM32_EXTI_CPUIMR2 |= BIT(15); /* [15] wkup47: LPTIM1 wake-up */ /* optimize power vs latency in STOP mode */ STM32_PWR_CR = (STM32_PWR_CR & ~STM32_PWR_CR_SVOS_MASK) |