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authorShawn Nematbakhsh <shawnn@chromium.org>2015-09-07 14:12:57 -0700
committerchrome-bot <chrome-bot@chromium.org>2015-09-16 14:49:33 -0700
commitfe77303bec6c78786a9df1dbdb33af64787e20c8 (patch)
tree772d2fbb53178121ddca0dfbafbd304ee075ce1b /chip/stm32/config-stm32f09x.h
parent1167cad6a88e45bbf6a5599f19d018cd6a8b5233 (diff)
downloadchrome-ec-fe77303bec6c78786a9df1dbdb33af64787e20c8.tar.gz
cleanup: Remove redundant FLASH_SIZE CONFIGs
Since there is no more concept of a flash region belonging only to the EC, we only need one FLASH_SIZE config, which represents the actual physical size of flash. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6 Reviewed-on: https://chromium-review.googlesource.com/297824 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/stm32/config-stm32f09x.h')
-rw-r--r--chip/stm32/config-stm32f09x.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/stm32/config-stm32f09x.h b/chip/stm32/config-stm32f09x.h
index 29a0cd248b..cfd57e1bf9 100644
--- a/chip/stm32/config-stm32f09x.h
+++ b/chip/stm32/config-stm32f09x.h
@@ -4,7 +4,7 @@
*/
/* Memory mapping */
-#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000
+#define CONFIG_FLASH_SIZE 0x00040000
#define CONFIG_FLASH_BANK_SIZE 0x2000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */