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authorTom Hughes <tomhughes@chromium.org>2022-09-21 14:08:36 -0700
committerTom Hughes <tomhughes@chromium.org>2022-09-22 12:59:38 -0700
commitc453fd704268ef72de871b0c5ac7a989de662334 (patch)
treefcf6ce5810f9ff9e3c8cce434812dd75492269ed /chip/stm32/config-stm32f4.h
parent6c1587ca70f558b4f96b3f0b18ad8b027d3ba99d (diff)
parent28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff)
downloadchrome-ec-c453fd704268ef72de871b0c5ac7a989de662334.tar.gz
Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-releasefirmware-fpmcu-dartmonkey-release
Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release Relevant changes: git log --oneline 6c1587ca70..28712dae9d -- board/nocturne_fp board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint util/getversion.sh ded9307b79 util/getversion.sh: Fix version when not in a git repo 956055e692 board: change Google USB vendor info 71b2ef709d Update license boilerplate text in source code files 33e11afda0 Revert "fpsensor: Build fpsensor source file with C++" c8d0360723 fpsensor: Build fpsensor source file with C++ bc113abd53 fpsensor: Fix g++ compiler error 150a58a0dc fpsensor: Fix fp_set_sensor_mode return type b33b5ce85b fpsensor: Remove nested designators for C++ compatibility 2e864b2539 tree-wide: const-ify argv for console commands 56d8b360f9 test: Add test for get ikm failure when seed not set 3a3d6c3690 test: Add test for fpsensor trivial key failure 233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256 0a041b285b docs/fingerprint: Typo correction c03fab67e2 docs/fingerprint: Fix the path of fputils.py 0b5d4baf5a util/getversion.sh: Fix empty file list handling 6e128fe760 FPMCU dev board environment with Satlab 3eb29b6aa5 builtin: Move ssize_t to sys/types.h 345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release c25ffdb316 common: Conditionally support printf %l and %i modifiers 9a3c514b45 test: Add a test to check if the debugger is connected 54e603413f Move standard library tests to their own file 43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release 25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format 4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format 738de2b575 trng: Rename rand to trng_rand 14b8270edd docs/fingerprint: Update dragonclaw power numbers 0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format a0751778f4 board/nocturne_fp/ro_workarounds.c: Format with clang-format 5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format 6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format 58f0246dbe board/nocturne_fp/board_ro.c: Format with clang-format 7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format 21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format 98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format 84e53a65da board/nocturne_fp/board.h: Format with clang-format 73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format 0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format 1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format dca9d74321 Revert "trng: Rename rand to trng_rand" a6b0b3554f trng: Rename rand to trng_rand 28d0b75b70 third_party/boringssl: Remove unused header BRANCH=None BUG=b:244387210 b:242720240 b:215613183 b:242720910 b:236386294 BUG=b:234181908 b:244781166 b:234781655 b:234143158 b:234181908 BUG=b:237344361 b:236025198 b:234181908 b:180945056 chromium:1098010 BUG=b:246424843 b:234181908 b:131913998 TEST=`make -j buildall` TEST=./util/run_device_tests.py --board dartmonkey Test "aes": PASSED Test "cec": PASSED Test "cortexm_fpu": PASSED Test "crc": PASSED Test "flash_physical": PASSED Test "flash_write_protect": PASSED Test "fpsensor_hw": PASSED Test "fpsensor_spi_ro": PASSED Test "fpsensor_spi_rw": PASSED Test "fpsensor_uart_ro": PASSED Test "fpsensor_uart_rw": PASSED Test "mpu_ro": PASSED Test "mpu_rw": PASSED Test "mutex": PASSED Test "pingpong": PASSED Test "printf": PASSED Test "queue": PASSED Test "rollback_region0": PASSED Test "rollback_region1": PASSED Test "rollback_entropy": PASSED Test "rtc": PASSED Test "sha256": PASSED Test "sha256_unrolled": PASSED Test "static_if": PASSED Test "stdlib": PASSED Test "system_is_locked_wp_on": PASSED Test "system_is_locked_wp_off": PASSED Test "timer_dos": PASSED Test "utils": PASSED Test "utils_str": PASSED Test "panic_data_dartmonkey_v2.0.2887": PASSED Test "panic_data_nocturne_fp_v2.2.64": PASSED Test "panic_data_nami_fp_v2.2.144": PASSED Force-Relevant-Builds: all Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I2c312583a709fedae8fe11d92c22328c3b634bc7
Diffstat (limited to 'chip/stm32/config-stm32f4.h')
-rw-r--r--chip/stm32/config-stm32f4.h47
1 files changed, 23 insertions, 24 deletions
diff --git a/chip/stm32/config-stm32f4.h b/chip/stm32/config-stm32f4.h
index ee1d594116..d7ef668886 100644
--- a/chip/stm32/config-stm32f4.h
+++ b/chip/stm32/config-stm32f4.h
@@ -1,13 +1,13 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+/* Copyright 2016 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Memory mapping */
#ifdef CHIP_VARIANT_STM32F412
-# define CONFIG_FLASH_SIZE_BYTES (1 * 1024 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES (1 * 1024 * 1024)
#else
-# define CONFIG_FLASH_SIZE_BYTES (512 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES (512 * 1024)
#endif
/* 3 regions type: 16K, 64K and 128K */
@@ -31,33 +31,32 @@
#define CONFIG_FLASH_WRITE_IDEAL_SIZE CONFIG_FLASH_WRITE_SIZE
#ifdef CHIP_VARIANT_STM32F412
-# define CONFIG_RAM_BASE 0x20000000
-# define CONFIG_RAM_SIZE 0x00040000 /* 256 KB */
+#define CONFIG_RAM_BASE 0x20000000
+#define CONFIG_RAM_SIZE 0x00040000 /* 256 KB */
#else
-# define CONFIG_RAM_BASE 0x20000000
-# define CONFIG_RAM_SIZE 0x00020000 /* 128 KB */
+#define CONFIG_RAM_BASE 0x20000000
+#define CONFIG_RAM_SIZE 0x00020000 /* 128 KB */
#endif
-#define CONFIG_RO_MEM_OFF 0
-#define CONFIG_RO_SIZE (256 * 1024)
-#define CONFIG_RW_MEM_OFF (256 * 1024)
-#define CONFIG_RW_SIZE (256 * 1024)
+#define CONFIG_RO_MEM_OFF 0
+#define CONFIG_RO_SIZE (256 * 1024)
+#define CONFIG_RW_MEM_OFF (256 * 1024)
+#define CONFIG_RW_SIZE (256 * 1024)
-#define CONFIG_RO_STORAGE_OFF 0
-#define CONFIG_RW_STORAGE_OFF 0
+#define CONFIG_RO_STORAGE_OFF 0
+#define CONFIG_RW_STORAGE_OFF 0
-#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
-#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF
-#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
-#define CONFIG_EC_WRITABLE_STORAGE_SIZE \
- (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
-
-#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
-#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
+#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
+#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF
+#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
+#define CONFIG_EC_WRITABLE_STORAGE_SIZE \
+ (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
+#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
+#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
#undef I2C_PORT_COUNT
-#define I2C_PORT_COUNT 4
+#define I2C_PORT_COUNT 4
/* Use PSTATE embedded in the RO image, not in its own erase block */
#define CONFIG_FLASH_PSTATE
@@ -67,12 +66,12 @@
#define CONFIG_OTP
/* Number of IRQ vectors on the NVIC */
-#define CONFIG_IRQ_COUNT 97
+#define CONFIG_IRQ_COUNT 97
#undef CONFIG_CMD_CHARGEN
/* DFU Address */
-#define STM32_DFU_BASE 0x1fff0000
+#define STM32_DFU_BASE 0x1fff0000
/*
* SET_RTC_MATCH_DELAY: max time to set RTC match alarm. If we set the alarm