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authorDaisuke Nojiri <dnojiri@chromium.org>2016-04-20 14:49:56 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-04-25 16:49:02 -0700
commit40c02e3ff2477df1aca7657a92905816e5a13d0c (patch)
tree57f05231828259506bf8bfdd2c494e533715e01f /chip/stm32/config-stm32l476.h
parentcb0d8108e5a5b630ec05a8d21a824cb601246bf5 (diff)
downloadchrome-ec-40c02e3ff2477df1aca7657a92905816e5a13d0c.tar.gz
Bring up STM32L476G-Eval
This patch adds initial set of files to bring up STM32L476G-Eval board. BUG=none BRANCH=tot TEST=Tested console. make buildall && make tests Change-Id: I0c0f73f31e84099746fced4214c5ed7f45468cef Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/340100 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/config-stm32l476.h')
-rw-r--r--chip/stm32/config-stm32l476.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/chip/stm32/config-stm32l476.h b/chip/stm32/config-stm32l476.h
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index 0000000000..9f6b35b8b1
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+++ b/chip/stm32/config-stm32l476.h
@@ -0,0 +1,20 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Memory mapping */
+#define CONFIG_FLASH_SIZE 0x00100000 /* 1 MB */
+#define CONFIG_FLASH_BANK_SIZE 0x800 /* 2 kB */
+#define CONFIG_FLASH_ERASE_SIZE 0x800 /* 2 KB */
+#define CONFIG_FLASH_WRITE_SIZE 0x8 /* 64 bits (without 8 bits ECC) */
+
+/* Ideal write size in page-mode */
+#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x100 /* 256 (32 double words) */
+
+#define CONFIG_RAM_BASE 0x20000000
+/* Only using SRAM1. SRAM2 (32 KB) is ignored. */
+#define CONFIG_RAM_SIZE 0x00018000 /* 96 kB */
+
+/* Number of IRQ vectors on the NVIC */
+#define CONFIG_IRQ_COUNT 82