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| author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-11 16:07:55 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:56 -0700 |
| commit | ac77140b7f4f42075d2377fc9d956a636b05aacf (patch) | |
| tree | c64c6a30916ff741a2ab235141f7bd071cd54483 /chip/stm32/flash-stm32h7.c | |
| parent | bb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (diff) | |
| download | chrome-ec-ac77140b7f4f42075d2377fc9d956a636b05aacf.tar.gz | |
common: bit change 1 << constants with BIT(constants)
Mechanical replacement of bit operation where operand is a constant.
More bit operation exist, but prone to errors.
Reveal a bug in npcx:
chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow]
BUG=None
BRANCH=None
TEST=None
Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518660
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/stm32/flash-stm32h7.c')
| -rw-r--r-- | chip/stm32/flash-stm32h7.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c index 0f82bf409a..ba0a8a69f1 100644 --- a/chip/stm32/flash-stm32h7.c +++ b/chip/stm32/flash-stm32h7.c @@ -46,7 +46,7 @@ */ #define HWBANK_SIZE (CONFIG_FLASH_SIZE / 2) #define BLOCKS_PER_HWBANK (HWBANK_SIZE / CONFIG_FLASH_ERASE_SIZE) -#define BLOCKS_HWBANK_MASK ((1 << BLOCKS_PER_HWBANK) - 1) +#define BLOCKS_HWBANK_MASK (BIT(BLOCKS_PER_HWBANK) - 1) /* * We can tune the power consumption vs erase/write speed @@ -358,7 +358,7 @@ int flash_physical_get_protect(int block) int bank = block / BLOCKS_PER_HWBANK; int index = block % BLOCKS_PER_HWBANK; - return !(STM32_FLASH_WPSN_CUR(bank) & (1 << index)); + return !(STM32_FLASH_WPSN_CUR(bank) & BIT(index)); } /* |