diff options
| author | Nicolas Boichat <drinkcat@chromium.org> | 2019-06-24 15:48:38 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-06-26 07:05:08 +0000 |
| commit | 980e781552164e54485b13e03ab9897fefc2a45d (patch) | |
| tree | d927c9bff7834f98798df52e2c44b4c7cf6579a7 /chip/stm32/gpio.c | |
| parent | 770f45fac4c7b33e7149ea7906ee5a6eeb852425 (diff) | |
| download | chrome-ec-980e781552164e54485b13e03ab9897fefc2a45d.tar.gz | |
chip/stm32/gpio: Disable external interrupts in gpio_pre_init
After a sysjump, external interrupts are left enabled. However,
exti_events is reset to 0, so upon receiving an interrupt,
gpio_interrupt will call the handler for signal 0 (the first
GPIO_INT defined in gpio.inc) for these sources.
This is obviously very wrong, and the easiest (and most robust) way
to fix this is to disable all interrupts on sysjump, and let the
new code re-enable if desired.
BRANCH=none
BUG=chromium:977950
TEST=On kukui, with following CL, trigger a watchdog (stop daisydog;
echo > /dev/watchdog), see that no interrupt is generated.
Change-Id: Ic55262f8b8dd9d154619cb0620e1889b3da3feec
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1673950
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/stm32/gpio.c')
| -rw-r--r-- | chip/stm32/gpio.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/chip/stm32/gpio.c b/chip/stm32/gpio.c index d3fb6b2797..fe79ca5aad 100644 --- a/chip/stm32/gpio.c +++ b/chip/stm32/gpio.c @@ -36,6 +36,9 @@ void gpio_pre_init(void) /* Delay 1 APB clock cycle after the clock is enabled */ clock_wait_bus_cycles(BUS_APB, 1); + /* Disable all GPIO EXTINTs (EXTINT0..15) left enabled after sysjump. */ + STM32_EXTI_IMR &= ~0xFFFF; + if (!is_warm) gpio_enable_clocks(); |