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authorDavid Hendricks <dhendrix@chromium.org>2013-02-15 11:43:07 -0800
committerChromeBot <chrome-bot@google.com>2013-03-08 12:01:46 -0800
commitea000b0fc00c5e998dc11a455e98626389303984 (patch)
tree0a4a56427403d8f23128f5bbc13cc7ed18b0bd16 /chip/stm32/hwtimer.c
parenta44e0d91c8cf30c56d06ed8378b5f49760876d4a (diff)
downloadchrome-ec-ea000b0fc00c5e998dc11a455e98626389303984.tar.gz
stm32f10x: Initial import
This adds initial support for the other chips in the stm32f10x series: stm32f101, stm32f102x, stm32f103x, stm32f105x, stm32f107x. The main difference is in the register definitions. Clock, flash, GPIO, and JTAG modules are similar enough that for now we can symlink the existing source for stm32f100. BRANCH=none BUG=none TEST=Tested on McCroskey (follow-up CL) Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I67363d02578e21be51d842b6bd8b5e4848720993 Reviewed-on: https://gerrit.chromium.org/gerrit/43412 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'chip/stm32/hwtimer.c')
-rw-r--r--chip/stm32/hwtimer.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c
index ef09a8dd5e..691ee23d33 100644
--- a/chip/stm32/hwtimer.c
+++ b/chip/stm32/hwtimer.c
@@ -16,10 +16,8 @@
/* Divider to get microsecond for the clock */
#define CLOCKSOURCE_DIVIDER (CPU_CLOCK / SECOND)
-#ifdef CHIP_VARIANT_stm32f100
#define TIM_WD_IRQ STM32_IRQ_TIM1_UP_TIM16
#define TIM_WD 1 /* Timer to use for watchdog */
-#endif
/*
* TIM_CLOCK_MSB and TIM_CLOCK_LSB must be defined per board. The available
@@ -191,7 +189,7 @@ int __hw_clock_source_init(uint32_t start_t)
* doesn't appear to exist in either variant, and TIM9 cannot be triggered as a
* slave from TIM4. We could perhaps use TIM9 as our fast counter on STM32L.
*/
-#ifdef CHIP_VARIANT_stm32f100
+#ifndef CHIP_VARIANT_stm32l15x
void watchdog_check(uint32_t excep_lr, uint32_t excep_sp)
{